MIPS_PRID_IMPL
const u_int pid = MIPS_PRID_IMPL(mips_options.mips_cpu_id);
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
switch (MIPS_PRID_IMPL(cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
switch (MIPS_PRID_IMPL(cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN68XX)
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN68XX)
if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN50XX) {
switch (MIPS_PRID_IMPL(cpu_id)) {
panic("IMPL 0x%02x not implemented", MIPS_PRID_IMPL(cpu_id));
switch(MIPS_PRID_IMPL(cpu_id)) {
switch (MIPS_PRID_IMPL(cpu_id)) {
MIPS_PRID_IMPL(cpu_id));
switch (MIPS_PRID_IMPL(cpu_id)) {
if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4600 &&
} else if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4600 &&
if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4100 &&
MIPS_PRID_IMPL(cpu_id));
switch (MIPS_PRID_IMPL(cpu_id)) {
MIPS_PRID_IMPL(cpu_id));
switch (MIPS_PRID_IMPL(cpu_id)) {
MIPS_PRID_IMPL(cpu_id) != ct->cpu_pid)
if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4100)
if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4100)
MIPS_PRID_IMPL(fpu_id) == fputab[i].cpu_pid) {
if (fpuname == NULL && MIPS_PRID_IMPL(fpu_id) == MIPS_PRID_IMPL(cpu_id))
if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4700) /* FPU PRid is 0x20 */
if (MIPS_PRID_IMPL(cpu_id) == MIPS_RC64470) /* FPU PRid is 0x21 */
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
MIPS_PRID_IMPL(mips_options.mips_cpu_id));
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
__func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
__func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
switch (MIPS_PRID_IMPL(cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {