Symbol: MAXCPUS
sys/arch/aarch64/aarch64/cpu.c
123
KASSERT(unit < MAXCPUS);
sys/arch/aarch64/aarch64/cpu.c
90
#define NCPUINFO MAXCPUS
sys/arch/aarch64/aarch64/db_machdep.c
1080
volatile struct trapframe *db_readytoswitch[MAXCPUS];
sys/arch/arm/arm/arm_machdep.c
110
#define NCPUINFO MAXCPUS
sys/arch/arm/arm/cpu_subr.c
53
#define NCPUINFO MAXCPUS
sys/arch/arm/arm/cpu_subr.c
70
volatile u_long arm_cpu_hatched[howmany(MAXCPUS, CPUINDEX_DIVISOR)] __cacheline_aligned = { 0 };
sys/arch/arm/arm/cpu_subr.c
71
volatile u_long arm_cpu_mbox[howmany(MAXCPUS, CPUINDEX_DIVISOR)] __cacheline_aligned = { 0 };
sys/arch/arm/arm32/cpu.c
122
KASSERT(unit < MAXCPUS);
sys/arch/arm/cortex/gic.c
111
uint32_t sc_target[MAXCPUS];
sys/arch/arm/cortex/gic.c
248
for (n = 0; n < MAXCPUS; n++) {
sys/arch/arm/cortex/gic.c
259
for (n = 0; n < MAXCPUS; n++) {
sys/arch/arm/cortex/gic.c
280
for (n = 0; n < MAXCPUS; n++) {
sys/arch/arm/cortex/gic.c
579
for (int n = 0; n < MAXCPUS; n++) {
sys/arch/arm/cortex/gicv3_its.h
47
#define ITS_MAX_EVENTS (MAXCPUS * 2)
sys/arch/arm/fdt/cpu_fdt.c
174
KASSERT(cpuindex < MAXCPUS);
sys/arch/arm/include/arm32/machdep.h
10
#define INIT_ARM_TOTAL_STACK (INIT_ARM_STACK_SIZE * MAXCPUS)
sys/arch/arm/sunxi/sunxi_mc_smp.c
98
uint32_t sunxi_mc_cci_port[MAXCPUS];
sys/arch/mips/cavium/octeon_cpunode.c
87
CTASSERT(MAXCPUS <= sizeof(uint64_t) * NBBY);
sys/arch/mips/cavium/octeon_intr.c
210
#define OCTEON_NCPU MAXCPUS
sys/arch/mips/mips/cpu_subr.c
112
struct cpu_info * cpuid_infos[MAXCPUS] = {
sys/arch/mips/mips/cpu_subr.c
129
KASSERT(cpu_id < MAXCPUS);
sys/arch/powerpc/powerpc/powerpc_machdep.c
563
CTASSERT(MAXCPUS <= 32);
sys/arch/riscv/dev/plicvar.h
50
uint32_t sc_context[MAXCPUS];
sys/arch/riscv/fdt/cpu_fdt.c
115
KASSERT(cpuindex < MAXCPUS);
sys/arch/riscv/fdt/cpu_fdt.c
87
if (hartid > MAXCPUS) {
sys/arch/riscv/fdt/cpu_fdt.c
89
MAXCPUS);
sys/arch/riscv/riscv/cpu.c
194
KASSERT(hartid < MAXCPUS);
sys/arch/riscv/riscv/cpu.c
195
KASSERT(cpu_hartindex[hartid] < MAXCPUS);
sys/arch/riscv/riscv/cpu.c
52
#define NCPUINFO MAXCPUS
sys/arch/riscv/riscv/cpu_subr.c
60
unsigned int cpu_hartindex[MAXCPUS] = {
sys/arch/riscv/riscv/cpu_subr.c
61
[0 ... MAXCPUS - 1] = ~0U,
sys/arch/riscv/riscv/cpu_subr.c
76
#define N howmany(MAXCPUS, CPUINDEX_DIVISOR)
sys/arch/x86/include/pmap_private.h
132
struct pcpu_entry ent[MAXCPUS];
sys/arch/x86/x86/hyperv.c
123
uint32_t hyperv_vcpuid[MAXCPUS];
sys/arch/x86/x86/hyperv.c
500
for (i = 1; i < MAXCPUS; i++)
sys/arch/x86/x86/hyperv.c
521
if (cpu < MAXCPUS)
sys/arch/xen/x86/x86_xpmap.c
136
static mmu_update_t xpq_queue_array[MAXCPUS][XPQUEUE_SIZE];
sys/conf/param.c
126
u_int maxcpus = MAXCPUS;
sys/dev/hyperv/hvs.c
226
struct vmbus_channel *sc_sel_chan[MAXCPUS];
sys/dev/hyperv/vmbusvar.h
185
struct vmbus_percpu_data sc_percpu[MAXCPUS];
sys/dev/nvmm/x86/nvmm_x86_svm.c
2899
for (i = 0; i < MAXCPUS; i++) {
sys/dev/nvmm/x86/nvmm_x86_svm.c
493
static struct svm_hsave hsave[MAXCPUS];
sys/dev/nvmm/x86/nvmm_x86_vmx.c
3913
for (i = 0; i < MAXCPUS; i++) {
sys/dev/nvmm/x86/nvmm_x86_vmx.c
626
static struct vmxoncpu vmxoncpu[MAXCPUS];
sys/dev/tprof/tprof_x86_amd.c
111
static uint32_t amd_lapic_saved[MAXCPUS];
sys/dev/tprof/tprof_x86_intel.c
98
static uint32_t intel_lapic_saved[MAXCPUS];
sys/kern/kern_clock.c
105
cyclic_clock_func_t cyclic_clock_func[MAXCPUS];
sys/kern/subr_csan.c
65
static csan_cpu_t kcsan_cpus[MAXCPUS];
sys/kern/subr_kcpuset.c
57
#define KC_MAXCPUS roundup2(MAXCPUS, 32)
sys/kern/subr_spldebug.c
48
void *splraise_retaddrs[MAXCPUS][SPLRAISE_STACKLEN][4];
sys/kern/subr_spldebug.c
49
int splraise_depth[MAXCPUS] = {0};
sys/kern/subr_spldebug.c
50
int spllowered_to[MAXCPUS] = {0};
sys/kern/subr_spldebug.c
51
void *spllowered_from[MAXCPUS][2] = {{0}};
sys/rump/librump/rumpkern/scheduler.c
135
if (num > MAXCPUS) {
sys/rump/librump/rumpkern/scheduler.c
137
"available (adjusted)\n", num, MAXCPUS);
sys/rump/librump/rumpkern/scheduler.c
138
num = MAXCPUS;
sys/rump/librump/rumpkern/scheduler.c
69
} rcpu_storage[MAXCPUS];
sys/sys/param.h
215
#ifndef MAXCPUS
sys/sys/pool.h
272
void *pc_cpus[MAXCPUS];
sys/uvm/pmap/pmap_tlb.h
83
# define PMAP_TLB_MAX MAXCPUS