LE_CSR0
bus_space_write_2(*iot, *ioh, LER_RAP, LE_CSR0);
sc->sc_saved_csr0 = csr0 = lerdcsr(sc, LE_CSR0);
lewrcsr(sc, LE_CSR0, csr0 & ~LE_C0_INEA);
*LANCE_RAP = LE_CSR0;
*LANCE_RAP = LE_CSR0; /* Control and status register */
isr = lerdcsr(sc, LE_CSR0);
ler1->ler1_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
lereg->ler_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
ler1->ler1_rap = LE_CSR0;
LEWRCSR(LE_CSR0, LE_C0_STOP);
LEWRCSR(LE_CSR0, LE_C0_INIT);
if (LERDCSR(LE_CSR0) & LE_C0_IDON)
if (LERDCSR(LE_CSR0) & LE_C0_ERR) {
printf("lance init error: csr0 %x\n", LERDCSR(LE_CSR0));
LEWRCSR(LE_CSR0, LE_C0_INEA | LE_C0_STRT | LE_C0_IDON);
csr = LERDCSR(LE_CSR0);
LEWRCSR(LE_CSR0, csr & (LE_C0_BABL|LE_C0_MISS|LE_C0_MERR|LE_C0_RINT));
csr = LERDCSR(LE_CSR0);
LEWRCSR(LE_CSR0, csr & (LE_C0_MISS|LE_C0_CERR|LE_C0_TINT));
LEWRCSR(LE_CSR0, LE_C0_TDMD);
while (((LERDCSR(LE_CSR0) & LE_C0_TINT) == 0) && --to)
LEWRCSR(LE_CSR0, LE_C0_TINT);
LEWRCSR(LE_CSR0, LE_C0_STOP);
*sc->sc_rap = LE_CSR0;
*rap = LE_CSR0;
*rap = LE_CSR0;
*rap = LE_CSR0;
isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
(*sc->sc_wrcsr)(sc, LE_CSR0, isr);
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA);
(*sc->sc_wrcsr)(sc, LE_CSR0,
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
(*sc->sc_rdcsr)(sc, LE_CSR0));
(*sc->sc_rdcsr)(sc, LE_CSR0));
isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
(*sc->sc_wrcsr)(sc, LE_CSR0,
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
(*sc->sc_rdcsr)(sc, LE_CSR0));
(*sc->sc_rdcsr)(sc, LE_CSR0));
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INIT);
if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON)
if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON) {
(*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_STRT);
bus_space_write_2(iot, ioh, DEPCA_RAP, LE_CSR0);
bus_space_write_2(iot, ioh, DEPCA_RAP, LE_CSR0);
bus_space_write_2(iot, ioh, rap, LE_CSR0);
bus_space_write_2(iot, ioh, rap, LE_CSR0);
pcn_csr_write(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
csr0 = pcn_csr_read(sc, LE_CSR0);
pcn_csr_write(sc, LE_CSR0, csr0 &
pcn_csr_write(sc, LE_CSR0, LE_C0_INIT);
if (pcn_csr_read(sc, LE_CSR0) & LE_C0_IDON)
pcn_csr_write(sc, LE_CSR0, LE_C0_INEA | LE_C0_STRT | LE_C0_IDON);
pcn_csr_write(sc, LE_CSR0, LE_C0_STOP);