ARM_MMU_V7
#if (ARM_MMU_V6 + ARM_MMU_V7) != 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) != 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7) != 0
#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7) != 0
#if ARM_MMU_V7 > 0 && !defined(ARM_MMU_EXTENDED)
#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7) != 0
#if ARM_MMU_V7 > 0
#if ARM_MMU_V7 == 1
#if ARM_MMU_V7 == 0
#if ARM_MMU_V7 == 0
#elif ARM_MMU_V7 == 1
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7) != 0
#if ARM_MMU_V7 == 1
(ARM_MMU_V6N + ARM_MMU_V7 + ARM_MMU_V8) > 0)
ARM_MMU_V6N + ARM_MMU_V6C + ARM_MMU_V7 + ARM_MMU_V8)
#if (ARM_MMU_V6 + ARM_MMU_V7) != 0