IOASIC_IMSK
imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
imskp = (volatile uint32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
imsk = *(uint32_t *)(ioasic_base + IOASIC_IMSK);
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = KMIN_INTR_CLOCK;
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
old_mask = *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
imsk = *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
*(uint32_t *)(ioasic_base + IOASIC_IMSK) =
*(uint32_t *)(ioasic_base + IOASIC_IMSK) = old_mask;
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
*(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
imsk = *(uint32_t *)(ioasic_base + IOASIC_IMSK);
#define KMIN_REG_IMSK ( KMIN_SYS_ASIC + IOASIC_IMSK )
#define KN03_REG_IMSK ( KN03_SYS_ASIC + IOASIC_IMSK )
#define XINE_REG_IMSK ( XINE_SYS_ASIC + IOASIC_IMSK )
imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
*(volatile u_int *)(ioasic_base + IOASIC_IMSK) |=