FP_X_OFL
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
float_flag_overflow = FP_X_OFL,
& (FP_X_IMP | FP_X_UFL | FP_X_OFL | FP_X_DZ | FP_X_INV);
fpcr |= (disables & (FP_X_OFL | FP_X_DZ | FP_X_INV)) << (49 - 0);
__CTASSERT(ALPHA_AESR_OVF == (FP_X_OFL << 1));
__CTASSERT(IEEE_TRAP_ENABLE_OVF == (FP_X_OFL << 1));
__CTASSERT((uint64_t)FP_X_OFL << (49 - 0) == FPCR_OVFD);
#define FP_AA_FLAGS (FP_X_INV | FP_X_DZ | FP_X_OFL | FP_X_UFL | FP_X_IMP)
__fp |= FP_X_OFL;
if (__fp & FP_X_OFL)
float_flag_overflow = FP_X_OFL,
{ f_ofl, FP_X_OFL, FPE_FLTOVF },
{ d_ofl, FP_X_OFL, FPE_FLTOVF },
{ ld_ofl, FP_X_OFL, FPE_FLTOVF },
fp_except_t msk, lst[] = { FP_X_INV, FP_X_DZ, FP_X_OFL, FP_X_UFL };
fpsetmask(FP_X_INV|FP_X_DZ|FP_X_OFL|FP_X_UFL|FP_X_IMP);
fpsetmask(FP_X_INV|FP_X_DZ|FP_X_OFL|FP_X_UFL|FP_X_IMP);
fpsetmask(FP_X_INV|FP_X_DZ|FP_X_OFL|FP_X_UFL|FP_X_IMP);
fpsetmask(FP_X_OFL);
ATF_CHECK_EQ_MSG(fpgetmask(), FP_X_OFL,
(int)fpgetmask(), (int)FP_X_OFL);