Symbol: ENABLE
sys/altq/altq_cbq.c
1027
error = cbq_set_enable((struct cbq_interface *)addr, ENABLE);
sys/altq/altq_cbq.c
836
case ENABLE:
sys/altq/altq_wfq.c
100
case ENABLE:
sys/altq/altq_wfq.c
693
error = wfq_setenable((struct wfq_interface *)addr, ENABLE);
sys/arch/arm/nxp/imx6_clk.c
1131
CLK_GATE("pll1_sys", "pll1_bypass", CCM_ANALOG, PLL_ARM, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1132
CLK_GATE("pll2_bus", "pll2_bypass", CCM_ANALOG, PLL_SYS, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1133
CLK_GATE("pll3_usb_otg", "pll3_bypass", CCM_ANALOG, PLL_USB1, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1134
CLK_GATE("pll4_audio", "pll4_bypass", CCM_ANALOG, PLL_AUDIO, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1135
CLK_GATE("pll5_video", "pll5_bypass", CCM_ANALOG, PLL_VIDEO, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1136
CLK_GATE("pll6_enet", "pll6_bypass", CCM_ANALOG, PLL_ENET, ENABLE),
sys/arch/arm/nxp/imx6_clk.c
1137
CLK_GATE("pll7_usb_host", "pll7_bypass", CCM_ANALOG, PLL_USB2, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1239
CLK_GATE("pll1_sys", "pll1_bypass", CCM_ANALOG, PLL_ARM, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1240
CLK_GATE("pll2_bus", "pll2_bypass", CCM_ANALOG, PLL_SYS, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1241
CLK_GATE("pll3_usb_otg", "pll3_bypass", CCM_ANALOG, PLL_USB1, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1242
CLK_GATE("pll4_audio", "pll4_bypass", CCM_ANALOG, PLL_AUDIO, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1243
CLK_GATE("pll5_video", "pll5_bypass", CCM_ANALOG, PLL_VIDEO, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1244
CLK_GATE("pll6_enet", "pll6_bypass", CCM_ANALOG, PLL_ENET, ENABLE),
sys/arch/arm/nxp/imx6sx_clk.c
1245
CLK_GATE("pll7_usb_host", "pll7_bypass", CCM_ANALOG, PLL_USB2, ENABLE),
sys/arch/hpcmips/dev/mq200debug.c
263
ENABLE(reg & MQ200_GCC_ENABLE),
sys/arch/hpcmips/dev/mq200debug.c
270
ENABLE(reg & MQ200_GCC_WINEN),
sys/arch/hpcmips/dev/mq200debug.c
273
ENABLE(reg & MQ200_GCC_ALTEN),
sys/arch/hpcmips/dev/mq200debug.c
287
ENABLE(reg&MQ200_GC1CRTC_DACEN));
sys/arch/hpcmips/dev/mq200debug.c
534
ENABLE(reg & MQ200_FPC_ENABLE),
sys/arch/luna68k/dev/lcd.c
289
p1->portC = POWER | READ_BUSY | ENABLE;
sys/arch/luna68k/dev/lcd.c
293
msb = p1->portA & ENABLE;
sys/arch/luna68k/dev/lcd.c
313
p1->portC = POWER | WRITE_DATA | ENABLE;
sys/arch/luna68k/dev/lcd.c
330
p1->portC = POWER | WRITE_CMD | ENABLE;
sys/dev/ic/aic77xx.c
128
ahc_outb(ahc, BCTL, ENABLE);