vrip_intr_setmask2
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, (AIUINT_INTMEND | \
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, AIUINT_INTSEND, 1);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, AIUINT_INTSEND, 0);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, AIUINT_INTSEND, 0);
vrip_intr_setmask2(vc, ih, ~0, 0);
vrip_intr_setmask2(vc, ih, ~0, 0);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, (1 << 8) | (1 << 9) | (1 << 10), 1);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, (1 << 8) | (1 << 9) | (1 << 10), 0);
vrip_intr_setmask2(sc->sc_vc, sc->sc_ih, (1<<port), 1);
vrip_intr_setmask2(vc, ih, ~0, 0);
vrip_intr_setmask2(vc, ih, ~0, 0);
vrip_intr_setmask2(va->va_vc, sc->sc_handler, KIUINT_KDATRDY, 1);
vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, AD_INTR, 1);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, AD_INTR, 0);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, TP_INTR, 1);
vrip_intr_setmask2(sc->sc_vrip, sc->sc_handler, TP_INTR, 0);