vmem_add
error = vmem_add(vm, 0, 0x100000000UL, VM_NOSLEEP);
error = vmem_add(vm, 0, 0x100000000UL, VM_NOSLEEP);
error = vmem_add(vm, CHIP_IO_W1_BUS_START(v),
error = vmem_add(vm, CHIP_IO_W2_BUS_START(v),
error = vmem_add(dvm, CHIP_D_MEM_W1_BUS_START(v),
error = vmem_add(svm, CHIP_S_MEM_W1_BUS_START(v),
error = vmem_add(svm, CHIP_S_MEM_W2_BUS_START(v),
error = vmem_add(svm, CHIP_S_MEM_W3_BUS_START(v),
error = vmem_add(bst->bs_arena, bst->bs_start, bst->bs_size,
error = vmem_add(arc_wired_map_arena, VM_MIN_WIRED_MAP_ADDRESS,
error = vmem_add(sc->sc_ddev->cma_pool, sfb_addr,
vmem_add(bootm_arena, va, size, VM_NOSLEEP);
vmem_add(iomem_arena, startpa, size, VM_NOSLEEP);
int error = vmem_add(iomap_arena, iospace, iospace_size,
error = vmem_add(isaio_arena, 0x0, 0x10000, VM_NOSLEEP);
error = vmem_add(isamem_arena, 0x0, 0x100000, VM_NOSLEEP);
error = vmem_add(extio_arena, (vmem_addr_t)extiobase,
int error = vmem_add(iomap_arena, iospace + VAX_NBPG,
error = vmem_add(arena->vmem, start, end - start + 1, VM_SLEEP);
error = vmem_add(r->arena, start, size, VM_SLEEP);
if (vmem_add(vm, base, size, flags) != 0) {
rc = vmem_add(vm, 0, 50, VM_SLEEP);
rc = vmem_add(vm, 100, 200, VM_SLEEP);
rc = vmem_add(vm, 2000, 1, VM_SLEEP);
rc = vmem_add(vm, 40000, 65536, VM_SLEEP);
rc = vmem_add(vm, 10000, 10000, VM_SLEEP);
rc = vmem_add(vm, 500, 1000, VM_SLEEP);
rc = vmem_add(vm, 0xffffff00, 0x100, VM_SLEEP);
int vmem_add(vmem_t *, vmem_addr_t, vmem_size_t, vm_flag_t);