vBufB
#define ADB_SET_STATE_IDLE_II() via_reg(VIA1, vBufB) |= (vPB4 | vPB5)
#define ADB_SET_STATE_IDLE_IISI() via_reg(VIA1, vBufB) &= ~(vPB4 | vPB5)
#define ADB_SET_STATE_IDLE_CUDA() via_reg(VIA1, vBufB) |= (vPB4 | vPB5)
#define ADB_SET_STATE_CMD() via_reg(VIA1, vBufB) &= ~(vPB4 | vPB5)
#define ADB_SET_STATE_EVEN() via_reg(VIA1, vBufB) = ((via_reg(VIA1, \
vBufB) | vPB4) & ~vPB5)
#define ADB_SET_STATE_ODD() via_reg(VIA1, vBufB) = ((via_reg(VIA1, \
vBufB) | vPB5) & ~vPB4)
#define ADB_SET_STATE_ACTIVE() via_reg(VIA1, vBufB) |= vPB5
#define ADB_SET_STATE_INACTIVE() via_reg(VIA1, vBufB) &= ~vPB5
#define ADB_SET_STATE_TIP() via_reg(VIA1, vBufB) &= ~vPB5
#define ADB_CLR_STATE_TIP() via_reg(VIA1, vBufB) |= vPB5
#define ADB_SET_STATE_ACKON() via_reg(VIA1, vBufB) |= vPB4
#define ADB_SET_STATE_ACKOFF() via_reg(VIA1, vBufB) &= ~vPB4
#define ADB_TOGGLE_STATE_ACK_CUDA() via_reg(VIA1, vBufB) ^= vPB4
#define ADB_SET_STATE_ACKON_CUDA() via_reg(VIA1, vBufB) &= ~vPB4
#define ADB_SET_STATE_ACKOFF_CUDA() via_reg(VIA1, vBufB) |= vPB4
#define ADB_INTR_IS_OFF (vPB3 == (via_reg(VIA1, vBufB) & vPB3))
#define ADB_INTR_IS_ON (0 == (via_reg(VIA1, vBufB) & vPB3))
(void)via_reg(VIA1, vBufB);
#define PM_SET_STATE_ACKON() via_reg(VIA2, vBufB) |= 0x04
#define PM_SET_STATE_ACKOFF() via_reg(VIA2, vBufB) &= ~0x04
#define PM_IS_ON (0x02 == (via_reg(VIA2, vBufB) & 0x02))
#define PM_IS_OFF (0x00 == (via_reg(VIA2, vBufB) & 0x02))
via_reg(VIA1, vBufB) &= (0xff ^ DB1O_AuxIntEnb);
via_reg(VIA1, vBufB) |= (0x40);
via2_reg(vBufB) |= 0x02; /* Unlock NuBus */
via2_reg(vBufB) &= ~0x04; /* Shut down */
via_reg(VIA2, vBufB) |= DFAC_DATA;
via_reg(VIA2, vBufB) &= ~DFAC_DATA;
via_reg(VIA2, vBufB) |= DFAC_CLOCK;
via_reg(VIA2, vBufB) &= ~DFAC_CLOCK;
via_reg(VIA2, vBufB) |= DFAC_LATCH;
via_reg(VIA2, vBufB) &= ~DFAC_LATCH;
via_reg(VIA2, vBufB) &= ~DFAC_CLOCK;
#define ADB_SET_STATE_IDLE_CUDA() via_reg_or(VIA1, vBufB, (vPB4 | vPB5))
#define ADB_SET_STATE_TIP() via_reg_and(VIA1, vBufB, ~vPB5)
#define ADB_CLR_STATE_TIP() via_reg_or(VIA1, vBufB, vPB5)
#define ADB_TOGGLE_STATE_ACK_CUDA() via_reg_xor(VIA1, vBufB, vPB4)
#define ADB_SET_STATE_ACKOFF_CUDA() via_reg_or(VIA1, vBufB, vPB4)
#define ADB_INTR_IS_OFF (vPB3 == (read_via_reg(VIA1, vBufB) & vPB3))
#define ADB_INTR_IS_ON (0 == (read_via_reg(VIA1, vBufB) & vPB3))
(cuda_read_reg(sc, vBufB) & vPB3) == vPB3*/) {
reg = cuda_read_reg(sc, vBufB);
cuda_write_reg(sc, vBufB, reg);
reg = cuda_read_reg(sc, vBufB);
cuda_write_reg(sc, vBufB, reg);
reg = cuda_read_reg(sc, vBufB);
cuda_write_reg(sc, vBufB, reg);
reg = cuda_read_reg(sc, vBufB);
cuda_write_reg(sc, vBufB, reg);
reg = cuda_read_reg(sc, vBufB);
cuda_write_reg(sc, vBufB, reg);
return ((cuda_read_reg(sc, vBufB) & vPB3) == 0);
#define PM_SET_STATE_ACKON() via_reg_or(VIA2, vBufB, 0x10)
#define PM_SET_STATE_ACKOFF() via_reg_and(VIA2, vBufB, ~0x10)
#define PM_IS_ON (0x08 == (read_via_reg(VIA2, vBufB) & 0x08))
#define PM_IS_OFF (0x00 == (read_via_reg(VIA2, vBufB) & 0x08))
reg = pmu_read_reg(sc, vBufB);
pmu_write_reg(sc, vBufB, reg);
reg = pmu_read_reg(sc, vBufB);
pmu_write_reg(sc, vBufB, reg);
return ((pmu_read_reg(sc, vBufB) & vPB3) == 0);