tf_srr1
KASSERT(tf->tf_srr1 & PSL_DE);
if (__predict_false(tf->tf_srr1 & PSL_POW) && ci->ci_want_resched)
tf->tf_srr1 &= ~PSL_POW;
panic("%s: srr0/srr1=%#lx/%#lx", __func__, tf->tf_srr0, tf->tf_srr1);
panic("%s: srr0/srr1=%#lx/%#lx", __func__, tf->tf_srr0, tf->tf_srr1);
panic("%s: srr0/srr1=%#lx/%#lx", __func__, tf->tf_srr0, tf->tf_srr1);
__func__, tf, mftb(), tf->tf_srr0, tf->tf_srr1,
curlwp->l_proc->p_comm, tf->tf_srr0, tf->tf_srr1, tf);
tf->tf_srr1 &= ~PSL_POW; /* make cpu_idle exit */
l->l_md.md_utf->tf_srr1 |= PSL_SPV;
l->l_md.md_utf->tf_srr1 &= ~PSL_SPV;
return (tf->tf_srr1 & PSL_PR) != 0;
return (tf->tf_srr1 & psl_mask)
pmap_segtab_t * const stb = stbs[(tf->tf_srr1 / psl_mask) & 1];
tf->tf_srr0, tf->tf_srr1, tf->tf_esr,
KASSERT((tf->tf_srr1 & PSL_SE) == 0);
tf, tf->tf_exc, tf->tf_srr0, tf->tf_srr1, tf->tf_esr, tf->tf_dear);
tf->tf_srr1 = fb->fb_msr;
tf->tf_srr0, tf->tf_srr1, tf->tf_lr);
if (usertrap && (tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
trap_names[trap_code], tf->tf_srr1);
trap_code, tf, tf->tf_srr0, tf->tf_srr1);
trap_code, tf, tf->tf_srr0, tf->tf_srr1);
if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
trap_names[trap_code], tf->tf_srr1);
tf->tf_esr, tf->tf_srr0, tf->tf_srr1);
if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
trap_names[trap_code], tf->tf_srr1);
if (tf->tf_srr1 & PSL_PR) {
tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
tf->tf_srr1 |= PSL_IR; /* Re-enable IMMU */
KASSERTMSG((tf->tf_srr1 & PSL_PR) != 0,
tf, tf->tf_srr1);
KASSERTMSG((tf->tf_srr1 & PSL_FP) == 0
tf, tf->tf_srr1, l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU], l);
tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC);
tf->tf_srr1 |= l->l_md.md_flags & PSL_VEC;
if (__predict_false(tf->tf_srr1 & PSL_SE)) {
tf->tf_srr1 &= ~PSL_SE;
l->l_md.md_utf->tf_srr1 |= PSL_VEC;
l->l_md.md_utf->tf_srr1 &= ~PSL_VEC;
tf->tf_srr1 = sc.sc_frame.srr1;
utf->srr1 = tf->tf_srr1 & PSL_USERSRR1;
tf->tf_srr1 = utf->srr1;
if ((tf->tf_srr1 & PSL_PR) == 0)
if ((tf->tf_srr1 & PSL_PR) == 0 &&
(tf->tf_exc == EXC_PGM && (tf->tf_srr1 & 0x20000)) ||
if (type == EXC_PGM && (tf->tf_srr1 & 0x20000)) {
DDB_REGS->msr = tf->tf_srr1;
tf->tf_srr1 = DDB_REGS->msr;
tf->tf_srr0, tf->tf_srr1, tf->tf_dear, tf->tf_esr);
R(&tf->tf_srr1) & PSL_PR ? "user" : "kernel");
if (in_kernel && (R(&tf->tf_srr1) & PSL_PR) == 0) {
(*pr)("%p: srr1=%#x\n", lr, R(&tf->tf_srr1));
diff, R(&tf->tf_srr1));
in_kernel = !(R(&tf->tf_srr1) & PSL_PR);
l->l_md.md_utf->tf_srr1 &= ~PSL_FP;
l->l_md.md_utf->tf_srr1 |= PSL_FP|(pcb->pcb_flags & (PCB_FE0|PCB_FE1));
tf->tf_srr1 = PSL_MBO | PSL_USERSET;
register_t msr = tf->tf_srr1 & PSL_USERSRR1;
if (tf->tf_srr1 & PSL_FP) {
tf->tf_srr1 &= ~(PSL_FE0|PSL_FE1);
tf->tf_srr1 |= msr & (PSL_FE0|PSL_FE1);
tf->tf_srr1 |= PSL_SE;
tf->tf_srr1 &= ~PSL_SE;
gr[_REG_MSR] = tf->tf_srr1 & PSL_USERSRR1;
tf->tf_srr1 = (gr[_REG_MSR] & PSL_USERMOD) | PSL_USERSET;
tf->tf_srr1 &= ~(PSL_FP|PSL_VEC); /* Disable FP & AltiVec, as we can't
const bool usertrap = (tf->tf_srr1 & PSL_PR);
tf->tf_srr1 &= ~PSL_SE;
tf->tf_srr0, tf->tf_srr1, tf->tf_lr);
tf->tf_srr0, tf->tf_srr1);
tf->tf_srr0, tf->tf_srr1);
p->p_pid, p->p_comm, tf->tf_srr0, tf->tf_srr1);
if (tf->tf_srr1 & 0x00020000) { /* Bit 14 is set if trap */
if (tf->tf_srr1 & 0x100000) {
} else if (tf->tf_srr1 & 0x40000) {
p->p_comm, tf->tf_srr0, tf->tf_srr1);
p->p_comm, tf->tf_srr0, tf->tf_srr1);
p->p_comm, tf->tf_srr0, tf->tf_srr1);
linux_regs.lmsr = tf->tf_srr1 & PSL_USERSRR1;
tf->tf_srr1 = lregs->lmsr;
tf->tf_srr1 = lregs->lmsr;