Symbol: DBGUREG
sys/arch/arm/at91/at91bus.c
201
cidr = DBGUREG(DBGU_CIDR);
sys/arch/arm/at91/at91dbgu.c
1000
DBGUREG(DBGU_IER) = DBGU_INT_RXRDY;
sys/arch/arm/at91/at91dbgu.c
1044
imr = DBGUREG(DBGU_IMR);
sys/arch/arm/at91/at91dbgu.c
1049
sr = DBGUREG(DBGU_SR);
sys/arch/arm/at91/at91dbgu.c
1065
c = DBGUREG(DBGU_RHR);
sys/arch/arm/at91/at91dbgu.c
1067
DBGUREG(DBGU_CR) = DBGU_CR_RSTSTA;
sys/arch/arm/at91/at91dbgu.c
1119
DBGUREG(DBGU_IDR) = DBGU_INT_TXRDY;
sys/arch/arm/at91/at91dbgu.c
231
DBGUREG(DBGU_IDR) = -1;
sys/arch/arm/at91/at91dbgu.c
243
DBGUREG(DBGU_IER) = DBGU_INT_RXRDY; // @@@@@
sys/arch/arm/at91/at91dbgu.c
372
while (DBGUREG(DBGU_SR) & DBGU_SR_TXRDY) {
sys/arch/arm/at91/at91dbgu.c
375
DBGUREG(DBGU_THR) = *(sc->sc_tba + n) & 0xff;
sys/arch/arm/at91/at91dbgu.c
421
DBGUREG(DBGU_IER) = DBGU_INT_TXRDY;
sys/arch/arm/at91/at91dbgu.c
443
DBGUREG(DBGU_IDR) = -1;
sys/arch/arm/at91/at91dbgu.c
518
DBGUREG(DBGU_IER) = DBGU_INT_RXRDY;
sys/arch/arm/at91/at91dbgu.c
784
while (DBGUREG(DBGU_SR) & DBGU_SR_RXRDY
sys/arch/arm/at91/at91dbgu.c
791
DBGUREG(DBGU_RHR);
sys/arch/arm/at91/at91dbgu.c
802
DBGUREG(DBGU_MR) = DBGU_MR_PAR_NONE;
sys/arch/arm/at91/at91dbgu.c
803
DBGUREG(DBGU_BRGR) = sc->sc_brgr;
sys/arch/arm/at91/at91dbgu.c
804
DBGUREG(DBGU_CR) = DBGU_CR_TXEN | DBGU_CR_RXEN; // @@@ just in case
sys/arch/arm/at91/at91dbgu.c
845
DBGUREG(DBGU_IDR) = DBGU_INT_RXRDY;
sys/arch/arm/at91/at91dbgu.c
848
DBGUREG(DBGU_IER) = DBGU_INT_RXRDY;
sys/arch/arm/at91/at91dbgu.c
864
while((DBGUREG(DBGU_SR) & DBGU_SR_TXEMPTY) == 0) {
sys/arch/arm/at91/at91dbgu.c
891
sr = DBGUREG(DBGU_SR);
sys/arch/arm/at91/at91dbgu.c
893
DBGUREG(DBGU_CR) = DBGU_CR_RSTSTA; // reset status bits
sys/arch/arm/at91/at91dbgureg.h
187
DBGUREG(DBGU_PDC + PDC_PTCR) = PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS; \
sys/arch/arm/at91/at91dbgureg.h
188
DBGUREG(DBGU_BRGR) = ((mstclk) / 16 + (speed) / 2) / (speed); \
sys/arch/arm/at91/at91dbgureg.h
189
DBGUREG(DBGU_MR) = DBGU_MR_PAR_NONE; \
sys/arch/arm/at91/at91dbgureg.h
190
DBGUREG(DBGU_CR) = DBGU_CR_RSTSTA | DBGU_CR_RSTTX | DBGU_CR_RSTRX; \
sys/arch/arm/at91/at91dbgureg.h
191
DBGUREG(DBGU_CR) = DBGU_CR_TXEN | DBGU_CR_RXEN; \
sys/arch/arm/at91/at91dbgureg.h
192
(void)DBGUREG(DBGU_SR); \
sys/arch/arm/at91/at91dbgureg.h
197
while ((DBGUREG(DBGU_SR) & DBGU_SR_TXRDY) == 0) { \
sys/arch/arm/at91/at91dbgureg.h
200
DBGUREG(DBGU_THR) = ch; \
sys/arch/arm/at91/at91dbgureg.h
204
#define DBGU_PEEKC() ((DBGUREG(DBGU_SR) & DBGU_SR_RXRDY) ? DBGUREG(DBGU_RHR) : -1)