splclock
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
splvec.splclock = MIPS_SPL_0_1_2_3; //0x3f00
splvec.splclock = MIPS_SPL_0_1_2_3; //0x3f00
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
int s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock(); /* inhibit process switch */
s = splclock(); /* inhibit process switch */
s = splclock(); /* inhibit process switch */
s = splclock ();
s = splclock();
int s = splclock();
pcpl = splclock();
pri = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock();
s = splclock(); /* XXX really needed? */
s = splclock(); /* XXX really needed? */