Symbol: CSR_WRITE_4
sys/arch/arm/xscale/ixp425_pci_space.c
270
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
271
CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_READ);
sys/arch/arm/xscale/ixp425_pci_space.c
274
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/ixp425_pci_space.c
290
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
291
CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_READ);
sys/arch/arm/xscale/ixp425_pci_space.c
294
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/ixp425_pci_space.c
307
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
308
CSR_WRITE_4(PCI_NP_CBE, COMMAND_NP_IO_READ);
sys/arch/arm/xscale/ixp425_pci_space.c
311
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/ixp425_pci_space.c
329
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
330
CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_WRITE);
sys/arch/arm/xscale/ixp425_pci_space.c
331
CSR_WRITE_4(PCI_NP_WDATA, data);
sys/arch/arm/xscale/ixp425_pci_space.c
333
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/ixp425_pci_space.c
349
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
350
CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_WRITE);
sys/arch/arm/xscale/ixp425_pci_space.c
351
CSR_WRITE_4(PCI_NP_WDATA, data);
sys/arch/arm/xscale/ixp425_pci_space.c
353
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/ixp425_pci_space.c
364
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
sys/arch/arm/xscale/ixp425_pci_space.c
365
CSR_WRITE_4(PCI_NP_CBE, COMMAND_NP_IO_WRITE);
sys/arch/arm/xscale/ixp425_pci_space.c
366
CSR_WRITE_4(PCI_NP_WDATA, val);
sys/arch/arm/xscale/ixp425_pci_space.c
368
CSR_WRITE_4(PCI_ISR, ISR_PFE);
sys/arch/arm/xscale/pxa2x0_i2c.c
420
CSR_WRITE_4(sc, I2C_ICR, ICR_UR);
sys/arch/arm/xscale/pxa2x0_i2c.c
421
CSR_WRITE_4(sc, I2C_ISAR, 0);
sys/arch/arm/xscale/pxa2x0_i2c.c
422
CSR_WRITE_4(sc, I2C_ISR, ISR_ALL);
sys/arch/arm/xscale/pxa2x0_i2c.c
425
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr);
sys/arch/arm/xscale/pxa2x0_i2c.c
449
CSR_WRITE_4(sc, I2C_ISR, isr);
sys/arch/arm/xscale/pxa2x0_i2c.c
458
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START);
sys/arch/arm/xscale/pxa2x0_i2c.c
467
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_STOP);
sys/arch/arm/xscale/pxa2x0_i2c.c
483
CSR_WRITE_4(sc, I2C_IDBR, (addr << 1) | rd_req);
sys/arch/arm/xscale/pxa2x0_i2c.c
484
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START | ICR_TB);
sys/arch/arm/xscale/pxa2x0_i2c.c
504
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB
sys/arch/arm/xscale/pxa2x0_i2c.c
522
CSR_WRITE_4(sc, I2C_IDBR, byte);
sys/arch/arm/xscale/pxa2x0_i2c.c
523
CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB
sys/arch/arm/xscale/pxa2x0_mci.c
1040
CSR_WRITE_4(sc, MMC_PRTBUF, 1);
sys/arch/arm/xscale/pxa2x0_mci.c
154
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (val))
sys/arch/arm/xscale/pxa2x0_mci.c
156
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(val))
sys/arch/arm/xscale/pxa2x0_mci.c
173
CSR_WRITE_4(sc, MMC_I_MASK, sc->sc_imask);
sys/arch/arm/xscale/pxa2x0_mci.c
184
CSR_WRITE_4(sc, MMC_I_MASK, sc->sc_imask);
sys/arch/arm/xscale/pxa2x0_mci.c
358
CSR_WRITE_4(sc, MMC_SPI, 0);
sys/arch/arm/xscale/pxa2x0_mci.c
359
CSR_WRITE_4(sc, MMC_RESTO, 0x7f);
sys/arch/arm/xscale/pxa2x0_mci.c
360
CSR_WRITE_4(sc, MMC_I_MASK, sc->sc_imask);
sys/arch/arm/xscale/pxa2x0_mci.c
511
CSR_WRITE_4(sc, MMC_CLKRT, sc->sc_clkrt);
sys/arch/arm/xscale/pxa2x0_mci.c
512
CSR_WRITE_4(sc, MMC_STRPCL, STRPCL_START);
sys/arch/arm/xscale/pxa2x0_mci.c
578
CSR_WRITE_4(sc, MMC_CMD, cmd->c_opcode & CMD_MASK);
sys/arch/arm/xscale/pxa2x0_mci.c
579
CSR_WRITE_4(sc, MMC_ARGH, (cmd->c_arg >> 16) & ARGH_MASK);
sys/arch/arm/xscale/pxa2x0_mci.c
580
CSR_WRITE_4(sc, MMC_ARGL, cmd->c_arg & ARGL_MASK);
sys/arch/arm/xscale/pxa2x0_mci.c
619
CSR_WRITE_4(sc, MMC_BLKLEN, blklen);
sys/arch/arm/xscale/pxa2x0_mci.c
620
CSR_WRITE_4(sc, MMC_NOB, numblk);
sys/arch/arm/xscale/pxa2x0_mci.c
621
CSR_WRITE_4(sc, MMC_RDTO, RDTO_MASK);
sys/arch/arm/xscale/pxa2x0_mci.c
682
CSR_WRITE_4(sc, MMC_CMDAT, cmdat);
sys/arch/arm/xscale/pxa2x0_mci.c
683
CSR_WRITE_4(sc, MMC_CLKRT, sc->sc_clkrt);
sys/arch/arm/xscale/pxa2x0_mci.c
684
CSR_WRITE_4(sc, MMC_STRPCL, STRPCL_START);
sys/arch/arm/xscale/pxa2x0_mci.c
734
CSR_WRITE_4(sc, MMC_STRPCL, STRPCL_STOP);
sys/arch/arm/xscale/pxa2x0_mci.c
988
CSR_WRITE_4(sc, MMC_PRTBUF, 1);
sys/arch/sandpoint/stand/altboot/fxp.c
202
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
sys/arch/sandpoint/stand/altboot/fxp.c
220
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sys/arch/sandpoint/stand/altboot/fxp.c
276
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, VTOPHYS(cbp));
sys/arch/sandpoint/stand/altboot/fxp.c
299
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, VTOPHYS(cb_ias));
sys/arch/sandpoint/stand/altboot/fxp.c
320
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, VTOPHYS(rfa));
sys/arch/sandpoint/stand/altboot/fxp.c
351
CSR_WRITE_4(l, FXP_CSR_SCB_GENERAL, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/fxp.c
517
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sys/arch/sandpoint/stand/altboot/kse.c
177
CSR_WRITE_4(l, TDLB, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/kse.c
178
CSR_WRITE_4(l, RDLB, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/kse.c
179
CSR_WRITE_4(l, MDTXC, 07); /* stretch short, add CRC, Tx enable */
sys/arch/sandpoint/stand/altboot/kse.c
180
CSR_WRITE_4(l, MDRXC, 01); /* Rx enable */
sys/arch/sandpoint/stand/altboot/kse.c
181
CSR_WRITE_4(l, MDRSC, 01); /* start receiving */
sys/arch/sandpoint/stand/altboot/kse.c
199
CSR_WRITE_4(l, MDTSC, 01); /* start transmission */
sys/arch/sandpoint/stand/altboot/kse.c
241
CSR_WRITE_4(l, MDRSC, 01); /* restart receiving */
sys/arch/sandpoint/stand/altboot/kse.c
254
CSR_WRITE_4(l, MDRSC, 01); /* necessary? */
sys/arch/sandpoint/stand/altboot/nvt.c
228
CSR_WRITE_4(l, VR_RDBA, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/nvt.c
229
CSR_WRITE_4(l, VR_TDBA, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/pcn.c
160
CSR_WRITE_4(l, PCN_RDP, 0);
sys/arch/sandpoint/stand/altboot/pcn.c
313
CSR_WRITE_4(l, PCN_RAP, r);
sys/arch/sandpoint/stand/altboot/pcn.c
320
CSR_WRITE_4(l, PCN_RAP, r);
sys/arch/sandpoint/stand/altboot/pcn.c
321
CSR_WRITE_4(l, PCN_RDP, v);
sys/arch/sandpoint/stand/altboot/pcn.c
327
CSR_WRITE_4(l, PCN_RAP, r);
sys/arch/sandpoint/stand/altboot/pcn.c
334
CSR_WRITE_4(l, PCN_RAP, r);
sys/arch/sandpoint/stand/altboot/pcn.c
335
CSR_WRITE_4(l, PCN_BDP, v);
sys/arch/sandpoint/stand/altboot/rge.c
173
CSR_WRITE_4(l, RGE_IDR0, reg);
sys/arch/sandpoint/stand/altboot/rge.c
175
CSR_WRITE_4(l, RGE_IDR4, reg);
sys/arch/sandpoint/stand/altboot/rge.c
221
CSR_WRITE_4(l, RGE_TCR, l->tcr);
sys/arch/sandpoint/stand/altboot/rge.c
222
CSR_WRITE_4(l, RGE_RCR, l->rcr);
sys/arch/sandpoint/stand/altboot/rge.c
223
CSR_WRITE_4(l, RGE_TNPDS, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/rge.c
224
CSR_WRITE_4(l, RGE_RDSAR, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/rge.c
225
CSR_WRITE_4(l, RGE_TNPDS + 4, 0);
sys/arch/sandpoint/stand/altboot/rge.c
226
CSR_WRITE_4(l, RGE_RDSAR + 4, 0);
sys/arch/sandpoint/stand/altboot/rge.c
319
CSR_WRITE_4(l, RGE_PHYAR, v);
sys/arch/sandpoint/stand/altboot/rge.c
334
CSR_WRITE_4(l, RGE_PHYAR, v);
sys/arch/sandpoint/stand/altboot/siisata.c
180
CSR_WRITE_4(sc, val | 01); /* perform init */
sys/arch/sandpoint/stand/altboot/siisata.c
182
CSR_WRITE_4(sc, val);
sys/arch/sandpoint/stand/altboot/skg.c
229
CSR_WRITE_4(l, SK_RAMCTL, 2); /* enable RAM interface */
sys/arch/sandpoint/stand/altboot/skg.c
252
CSR_WRITE_4(l, SK_RXMF1_CTRL_TEST, RFCTL_OPERATION_ON);
sys/arch/sandpoint/stand/altboot/skg.c
254
CSR_WRITE_4(l, SK_TXMF1_CTRL_TEST, TFCTL_OPERATION_ON);
sys/arch/sandpoint/stand/altboot/skg.c
274
CSR_WRITE_4(l, SK_RXRB1_CTLTST, RBCTL_UNRESET);
sys/arch/sandpoint/stand/altboot/skg.c
275
CSR_WRITE_4(l, SK_RXRB1_START, 0);
sys/arch/sandpoint/stand/altboot/skg.c
276
CSR_WRITE_4(l, SK_RXRB1_WR_PTR, 0);
sys/arch/sandpoint/stand/altboot/skg.c
277
CSR_WRITE_4(l, SK_RXRB1_RD_PTR, 0);
sys/arch/sandpoint/stand/altboot/skg.c
278
CSR_WRITE_4(l, SK_RXRB1_END, 0xfff);
sys/arch/sandpoint/stand/altboot/skg.c
279
CSR_WRITE_4(l, SK_RXRB1_CTLTST, RBCTL_ON);
sys/arch/sandpoint/stand/altboot/skg.c
280
CSR_WRITE_4(l, SK_TXRBS1_CTLTST, RBCTL_UNRESET);
sys/arch/sandpoint/stand/altboot/skg.c
281
CSR_WRITE_4(l, SK_TXRBS1_CTLTST, RBCTL_STORENFWD_ON);
sys/arch/sandpoint/stand/altboot/skg.c
282
CSR_WRITE_4(l, SK_TXRBS1_START, 0x1000);
sys/arch/sandpoint/stand/altboot/skg.c
283
CSR_WRITE_4(l, SK_TXRBS1_WR_PTR, 0x1000);
sys/arch/sandpoint/stand/altboot/skg.c
284
CSR_WRITE_4(l, SK_TXRBS1_RD_PTR, 0x1000);
sys/arch/sandpoint/stand/altboot/skg.c
285
CSR_WRITE_4(l, SK_TXRBS1_END, 0x1fff);
sys/arch/sandpoint/stand/altboot/skg.c
286
CSR_WRITE_4(l, SK_TXRBS1_CTLTST, RBCTL_ON);
sys/arch/sandpoint/stand/altboot/skg.c
303
CSR_WRITE_4(l, SK_RXQ1_BMU_CSR,
sys/arch/sandpoint/stand/altboot/skg.c
308
CSR_WRITE_4(l, SK_RXQ1_CURADDR_LO, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/skg.c
309
CSR_WRITE_4(l, SK_RXQ1_CURADDR_HI, 0);
sys/arch/sandpoint/stand/altboot/skg.c
311
CSR_WRITE_4(l, SK_TXQS1_BMU_CSR,
sys/arch/sandpoint/stand/altboot/skg.c
316
CSR_WRITE_4(l, SK_TXQS1_CURADDR_LO, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/skg.c
317
CSR_WRITE_4(l, SK_TXQS1_CURADDR_HI, 0);
sys/arch/sandpoint/stand/altboot/skg.c
319
CSR_WRITE_4(l, SK_IMR, 0);
sys/arch/sandpoint/stand/altboot/skg.c
320
CSR_WRITE_4(l, SK_RXQ1_BMU_CSR, RXBMU_RX_START);
sys/arch/sandpoint/stand/altboot/skg.c
340
CSR_WRITE_4(l, SK_BMU_TXS_CSR0, TXBMU_TX_START);
sys/arch/sandpoint/stand/altboot/skg.c
464
CSR_WRITE_4(l, SK_GPIO, (val | 0x2000000) & ~0x200);
sys/arch/sandpoint/stand/altboot/skg.c
467
CSR_WRITE_4(l, SK_GPHY_CTRL, GPHY_RESET_SET);
sys/arch/sandpoint/stand/altboot/skg.c
468
CSR_WRITE_4(l, SK_GMAC_CTRL, GMAC_RESET_SET);
sys/arch/sandpoint/stand/altboot/skg.c
470
CSR_WRITE_4(l, SK_GMAC_CTRL, GMAC_RESET_CLEAR);
sys/arch/sandpoint/stand/altboot/skg.c
471
CSR_WRITE_4(l, SK_GMAC_CTRL, GMAC_RESET_SET);
sys/arch/sandpoint/stand/altboot/skg.c
476
CSR_WRITE_4(l, SK_GPHY_CTRL, val | GPHY_RESET_SET);
sys/arch/sandpoint/stand/altboot/skg.c
478
CSR_WRITE_4(l, SK_GPHY_CTRL, val | GPHY_RESET_CLEAR);
sys/arch/sandpoint/stand/altboot/skg.c
479
CSR_WRITE_4(l, SK_GMAC_CTRL, GMAC_LOOP_OFF | GMAC_PAUSE_ON |
sys/arch/sandpoint/stand/altboot/stg.c
234
CSR_WRITE_4(l, STGE_TFDListPtrHi, 0);
sys/arch/sandpoint/stand/altboot/stg.c
235
CSR_WRITE_4(l, STGE_TFDListPtrLo, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/stg.c
236
CSR_WRITE_4(l, STGE_RFDListPtrHi, 0);
sys/arch/sandpoint/stand/altboot/stg.c
237
CSR_WRITE_4(l, STGE_RFDListPtrLo, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/stg.c
239
CSR_WRITE_4(l, STGE_MACCtrl, 0); /* do IFSSelect(0) first */
sys/arch/sandpoint/stand/altboot/stg.c
272
CSR_WRITE_4(l, STGE_MACCtrl, macctl);
sys/arch/sandpoint/stand/altboot/stg.c
302
CSR_WRITE_4(l, STGE_DMACtrl, DMAC_TxDMAPollNow);
sys/arch/sandpoint/stand/altboot/stg.c
364
CSR_WRITE_4(l, STGE_AsicCtrl, reg | AC_GlobalReset | AC_RxReset |
sys/arch/sandpoint/stand/altboot/vge.c
293
CSR_WRITE_4(l, VR_RDB, VTOPHYS(rxd));
sys/arch/sandpoint/stand/altboot/vge.c
296
CSR_WRITE_4(l, VR_TDB0, VTOPHYS(txd));
sys/arch/sandpoint/stand/altboot/vge.c
307
CSR_WRITE_4(l, VR_ISR, ~0);
sys/arch/sandpoint/stand/altboot/vge.c
308
CSR_WRITE_4(l, VR_IEN, 0);
sys/dev/ic/bwi.c
10107
CSR_WRITE_4(sc, BWI_INTRVEC, 0);
sys/dev/ic/bwi.c
10192
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
10229
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
10238
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
10257
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
10265
CSR_WRITE_4(sc, BWI_STATE_HI, 0);
sys/dev/ic/bwi.c
10270
CSR_WRITE_4(sc, BWI_IMSTATE, imstate);
sys/dev/ic/bwi.c
10277
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
10286
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
1164
CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs);
sys/dev/ic/bwi.c
1165
CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
sys/dev/ic/bwi.c
1212
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1226
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1230
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1236
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1255
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1268
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1270
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
1274
CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
sys/dev/ic/bwi.c
1275
CSR_WRITE_4(sc, BWI_MOBJ_DATA, v);
sys/dev/ic/bwi.c
1364
CSR_WRITE_4(sc, BWI_MAC_STATUS,
sys/dev/ic/bwi.c
1419
CSR_WRITE_4(sc, 0x188, 0x80000000);
sys/dev/ic/bwi.c
1420
CSR_WRITE_4(sc, 0x18c, 0x2000000);
sys/dev/ic/bwi.c
1426
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_TIMER1);
sys/dev/ic/bwi.c
1434
CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
sys/dev/ic/bwi.c
1515
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
1521
CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
sys/dev/ic/bwi.c
1534
CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
sys/dev/ic/bwi.c
2082
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
2085
CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
sys/dev/ic/bwi.c
2099
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
2101
CSR_WRITE_4(sc, BWI_MOBJ_DATA, 0x4000);
sys/dev/ic/bwi.c
2103
CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
sys/dev/ic/bwi.c
2106
CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
sys/dev/ic/bwi.c
2110
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_ALL_INTRS);
sys/dev/ic/bwi.c
2111
CSR_WRITE_4(sc, BWI_MAC_STATUS,
sys/dev/ic/bwi.c
2197
CSR_WRITE_4(sc, BWI_GPIO_CTRL, 0);
sys/dev/ic/bwi.c
2259
CSR_WRITE_4(sc, ofs, val32);
sys/dev/ic/bwi.c
2364
CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
sys/dev/ic/bwi.c
2509
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_READY);
sys/dev/ic/bwi.c
2558
CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
sys/dev/ic/bwi.c
2630
CSR_WRITE_4(sc, BWI_MAC_STATUS, val);
sys/dev/ic/bwi.c
2652
CSR_WRITE_4(sc, txrx_reg, BWI_TXRX32_CTRL_ADDRHI_MASK);
sys/dev/ic/bwi.c
6127
CSR_WRITE_4(sc, 0x100, 0x1000000);
sys/dev/ic/bwi.c
6129
CSR_WRITE_4(sc, 0x10c, 0x1000000);
sys/dev/ic/bwi.c
7067
CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC);
sys/dev/ic/bwi.c
7069
CSR_WRITE_4(sc, BWI_BUS_DATA, 0);
sys/dev/ic/bwi.c
7231
CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);
sys/dev/ic/bwi.c
7255
CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0);
sys/dev/ic/bwi.c
7257
CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1);
sys/dev/ic/bwi.c
7267
CSR_WRITE_4(sc, BWI_PLL_ON_DELAY,
sys/dev/ic/bwi.c
7269
CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY,
sys/dev/ic/bwi.c
774
CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status);
sys/dev/ic/bwi.c
777
CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i),
sys/dev/ic/bwi.c
7832
CSR_WRITE_4(sc, BWI_PIO_TXCTL(idx), *ctl);
sys/dev/ic/bwi.c
7843
CSR_WRITE_4(sc, BWI_PIO_TXCTL(idx), *ctl);
sys/dev/ic/bwi.c
7868
CSR_WRITE_4(sc, BWI_PIO_TXCTL(idx), ctl);
sys/dev/ic/bwi.c
8516
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
sys/dev/ic/bwi.c
8570
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
sys/dev/ic/bwi.c
8574
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
sys/dev/ic/bwi.c
8591
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
sys/dev/ic/bwi.c
8596
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
sys/dev/ic/bwi.c
8598
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
sys/dev/ic/bwi.c
9083
CSR_WRITE_4(sc, BWI_PIO_RXCTL(qid), BWI_PIO_RXCTL_FRAMERDY);
sys/dev/ic/bwi.c
9125
CSR_WRITE_4(sc, BWI_PIO_RXCTL(qid), BWI_PIO_RXCTL_DATARDY);
sys/dev/ic/bwi.c
9155
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_INDEX,
sys/dev/ic/bwi.c
9173
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_CTRL, 0);
sys/dev/ic/bwi.c
9190
CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_RINGINFO, 0);
sys/dev/ic/bwi.c
9262
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, 0);
sys/dev/ic/bwi.c
9278
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, 0);
sys/dev/ic/bwi.c
9883
CSR_WRITE_4(sc, tx_ctrl + BWI_TX32_INDEX,
sys/dev/ic/bwi.c
9916
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
sys/dev/ic/bwivar.h
100
CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
sys/dev/ic/bwivar.h
105
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
sys/dev/ic/bwivar.h
95
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
sys/dev/ic/i82557.c
1142
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sys/dev/ic/i82557.c
1628
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
sys/dev/ic/i82557.c
1705
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sys/dev/ic/i82557.c
1742
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sys/dev/ic/i82557.c
1864
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDCONFIGOFF);
sys/dev/ic/i82557.c
1899
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDIASOFF);
sys/dev/ic/i82557.c
1972
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, FXP_CDTXADDR(sc, sc->sc_txlast));
sys/dev/ic/i82557.c
1981
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sys/dev/ic/i82557.c
2120
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sys/dev/ic/i82557.c
2150
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sys/dev/ic/i82557.c
2295
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDMCSOFF);
sys/dev/ic/i82557.c
2408
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDUCODEOFF);
sys/dev/ic/i82557.c
526
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
sys/dev/ic/rtl8169.c
1548
CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
sys/dev/ic/rtl8169.c
1918
CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
sys/dev/ic/rtl8169.c
2013
CSR_WRITE_4(sc, RTK_IDR0, reg);
sys/dev/ic/rtl8169.c
2015
CSR_WRITE_4(sc, RTK_IDR4, reg);
sys/dev/ic/rtl8169.c
2028
CSR_WRITE_4(sc, RTK_RXLIST_ADDR_HI,
sys/dev/ic/rtl8169.c
2030
CSR_WRITE_4(sc, RTK_RXLIST_ADDR_LO,
sys/dev/ic/rtl8169.c
2033
CSR_WRITE_4(sc, RTK_TXLIST_ADDR_HI,
sys/dev/ic/rtl8169.c
2035
CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
sys/dev/ic/rtl8169.c
2039
CSR_WRITE_4(sc, RTK_MISC,
sys/dev/ic/rtl8169.c
2054
CSR_WRITE_4(sc, RTK_TXCFG,
sys/dev/ic/rtl8169.c
2057
CSR_WRITE_4(sc, RTK_TXCFG, RE_TXCFG_CONFIG);
sys/dev/ic/rtl8169.c
2061
CSR_WRITE_4(sc, RTK_RXCFG, RE_RXCFG_CONFIG);
sys/dev/ic/rtl8169.c
2076
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl8169.c
2085
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl8169.c
2109
CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
sys/dev/ic/rtl8169.c
2164
CSR_WRITE_4(sc, re8139_reg, defer / period);
sys/dev/ic/rtl8169.c
2320
CSR_WRITE_4(sc, RTK_RXCFG, CSR_READ_4(sc, RTK_RXCFG) &
sys/dev/ic/rtl8169.c
2325
CSR_WRITE_4(sc, RTK_MISC,
sys/dev/ic/rtl8169.c
260
CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
sys/dev/ic/rtl8169.c
286
CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
sys/dev/ic/rtl81x9.c
1150
CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
1316
CSR_WRITE_4(sc, txd->txd_txaddr,
sys/dev/ic/rtl81x9.c
1318
CSR_WRITE_4(sc, txd->txd_txstat,
sys/dev/ic/rtl81x9.c
1359
CSR_WRITE_4(sc, RTK_RXADDR, sc->recv_dmamap->dm_segs[0].ds_addr);
sys/dev/ic/rtl81x9.c
1374
CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
1375
CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
1384
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl81x9.c
1387
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl81x9.c
1395
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl81x9.c
1398
CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
sys/dev/ic/rtl81x9.c
1412
CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
sys/dev/ic/rtl81x9.c
1501
CSR_WRITE_4(sc, txd->txd_txaddr, 0);
sys/dev/ic/rtl81x9.c
540
CSR_WRITE_4(sc, RTK_RXCFG, rxfilt);
sys/dev/ic/rtl81x9.c
541
CSR_WRITE_4(sc, RTK_MAR0, 0xFFFFFFFF);
sys/dev/ic/rtl81x9.c
542
CSR_WRITE_4(sc, RTK_MAR4, 0xFFFFFFFF);
sys/dev/ic/rtl81x9.c
547
CSR_WRITE_4(sc, RTK_MAR0, 0);
sys/dev/ic/rtl81x9.c
548
CSR_WRITE_4(sc, RTK_MAR4, 0);
sys/dev/ic/rtl81x9.c
578
CSR_WRITE_4(sc, RTK_RXCFG, rxfilt);
sys/dev/ic/rtl81x9.c
587
CSR_WRITE_4(sc, RTK_MAR0, bswap32(hashes[1]));
sys/dev/ic/rtl81x9.c
588
CSR_WRITE_4(sc, RTK_MAR4, bswap32(hashes[0]));
sys/dev/ic/rtl81x9.c
590
CSR_WRITE_4(sc, RTK_MAR0, hashes[0]);
sys/dev/ic/rtl81x9.c
591
CSR_WRITE_4(sc, RTK_MAR4, hashes[1]);
sys/dev/ic/rtl81x9.c
786
CSR_WRITE_4(sc, txd->txd_txaddr, 0);
sys/dev/ic/rtl81x9.c
973
CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
sys/dev/ic/rtl81x9.c
974
CSR_WRITE_4(sc, RTK_RXADDR,
sys/dev/pci/if_age.c
1195
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
1611
CSR_WRITE_4(sc, AGE_MASTER_CFG, MASTER_RESET);
sys/dev/pci/if_age.c
1625
CSR_WRITE_4(sc, 0x12FC, 0x6500);
sys/dev/pci/if_age.c
1626
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_age.c
1664
CSR_WRITE_4(sc, AGE_PAR0,
sys/dev/pci/if_age.c
1666
CSR_WRITE_4(sc, AGE_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_age.c
1670
CSR_WRITE_4(sc, AGE_DESC_ADDR_HI, AGE_ADDR_HI(paddr));
sys/dev/pci/if_age.c
1672
CSR_WRITE_4(sc, AGE_DESC_RD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1674
CSR_WRITE_4(sc, AGE_DESC_RRD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1676
CSR_WRITE_4(sc, AGE_DESC_TPD_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1678
CSR_WRITE_4(sc, AGE_DESC_CMB_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1680
CSR_WRITE_4(sc, AGE_DESC_SMB_ADDR_LO, AGE_ADDR_LO(paddr));
sys/dev/pci/if_age.c
1683
CSR_WRITE_4(sc, AGE_DESC_RRD_RD_CNT,
sys/dev/pci/if_age.c
1689
CSR_WRITE_4(sc, AGE_DESC_TPD_CNT,
sys/dev/pci/if_age.c
1693
CSR_WRITE_4(sc, AGE_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_age.c
1709
CSR_WRITE_4(sc, AGE_IPG_IFG_CFG,
sys/dev/pci/if_age.c
1716
CSR_WRITE_4(sc, AGE_HDPX_CFG,
sys/dev/pci/if_age.c
1735
CSR_WRITE_4(sc, AGE_MASTER_CFG, reg);
sys/dev/pci/if_age.c
1748
CSR_WRITE_4(sc, AGE_FRAME_SIZE, sc->age_max_frame_size);
sys/dev/pci/if_age.c
1752
CSR_WRITE_4(sc, AGE_RXQ_JUMBO_CFG,
sys/dev/pci/if_age.c
1766
CSR_WRITE_4(sc, 0x12FC, 0x6500);
sys/dev/pci/if_age.c
1771
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_age.c
1807
CSR_WRITE_4(sc, AGE_RXQ_FIFO_PAUSE_THRESH,
sys/dev/pci/if_age.c
1812
CSR_WRITE_4(sc, AGE_RXQ_RRD_PAUSE_THRESH,
sys/dev/pci/if_age.c
1819
CSR_WRITE_4(sc, AGE_RXQ_CFG,
sys/dev/pci/if_age.c
1829
CSR_WRITE_4(sc, AGE_TXQ_CFG,
sys/dev/pci/if_age.c
1839
CSR_WRITE_4(sc, AGE_DMA_CFG,
sys/dev/pci/if_age.c
1845
CSR_WRITE_4(sc, AGE_CMB_WR_THRESH,
sys/dev/pci/if_age.c
1852
CSR_WRITE_4(sc, AGE_CMB_WR_TIMER,
sys/dev/pci/if_age.c
1857
CSR_WRITE_4(sc, AGE_SMB_TIMER, AGE_USECS(1000 * 1000));
sys/dev/pci/if_age.c
1858
CSR_WRITE_4(sc, AGE_CSMB_CTRL, CSMB_CTRL_SMB_ENB | CSMB_CTRL_CMB_ENB);
sys/dev/pci/if_age.c
1864
CSR_WRITE_4(sc, AGE_WOL_CFG, 0);
sys/dev/pci/if_age.c
1873
CSR_WRITE_4(sc, AGE_MAC_CFG,
sys/dev/pci/if_age.c
1887
CSR_WRITE_4(sc, AGE_INTR_STATUS, 0);
sys/dev/pci/if_age.c
1888
CSR_WRITE_4(sc, AGE_INTR_MASK, AGE_INTRS);
sys/dev/pci/if_age.c
1891
CSR_WRITE_4(sc, AGE_MAC_CFG, reg | MAC_CFG_TX_ENB | MAC_CFG_RX_ENB);
sys/dev/pci/if_age.c
1931
CSR_WRITE_4(sc, AGE_INTR_MASK, 0);
sys/dev/pci/if_age.c
1932
CSR_WRITE_4(sc, AGE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_age.c
1935
CSR_WRITE_4(sc, AGE_CSMB_CTRL, 0);
sys/dev/pci/if_age.c
1942
CSR_WRITE_4(sc, AGE_DMA_CFG,
sys/dev/pci/if_age.c
1946
CSR_WRITE_4(sc, AGE_TXQ_CFG,
sys/dev/pci/if_age.c
1948
CSR_WRITE_4(sc, AGE_RXQ_CFG,
sys/dev/pci/if_age.c
2095
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
2101
CSR_WRITE_4(sc, AGE_DMA_CFG, reg);
sys/dev/pci/if_age.c
2122
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
2128
CSR_WRITE_4(sc, AGE_DMA_CFG, reg);
sys/dev/pci/if_age.c
2282
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
2336
CSR_WRITE_4(sc, AGE_MAR0, mchash[0]);
sys/dev/pci/if_age.c
2337
CSR_WRITE_4(sc, AGE_MAR1, mchash[1]);
sys/dev/pci/if_age.c
2338
CSR_WRITE_4(sc, AGE_MAC_CFG, rxcfg);
sys/dev/pci/if_age.c
358
CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_age.c
390
CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_age.c
446
CSR_WRITE_4(sc, AGE_DMA_CFG, CSR_READ_4(sc, AGE_DMA_CFG) |
sys/dev/pci/if_age.c
449
CSR_WRITE_4(sc, AGE_MAC_CFG, reg);
sys/dev/pci/if_age.c
505
CSR_WRITE_4(sc, AGE_INTR_STATUS, status);
sys/dev/pci/if_age.c
514
CSR_WRITE_4(sc, AGE_INTR_STATUS, status);
sys/dev/pci/if_age.c
571
CSR_WRITE_4(sc, AGE_SPI_CTRL, reg);
sys/dev/pci/if_age.c
580
CSR_WRITE_4(sc, AGE_TWSI_CTRL, CSR_READ_4(sc, AGE_TWSI_CTRL) |
sys/dev/pci/if_age.c
615
CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_RST);
sys/dev/pci/if_age.c
617
CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_CLR);
sys/dev/pci/if_agereg.h
866
CSR_WRITE_4(_sc, AGE_MBOX, \
sys/dev/pci/if_alc.c
1020
CSR_WRITE_4(sc, ALC_GPHY_CFG, gphy);
sys/dev/pci/if_alc.c
1142
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
1177
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
1190
CSR_WRITE_4(sc, ALC_PEX_UNC_ERR_SEV, val);
sys/dev/pci/if_alc.c
1193
CSR_WRITE_4(sc, ALC_LTSSM_ID_CFG,
sys/dev/pci/if_alc.c
1195
CSR_WRITE_4(sc, ALC_PCIE_PHYMISC,
sys/dev/pci/if_alc.c
1205
CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);
sys/dev/pci/if_alc.c
1236
CSR_WRITE_4(sc, ALC_PDLL_TRNS1, val);
sys/dev/pci/if_alc.c
1243
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/pci/if_alc.c
1250
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/pci/if_alc.c
2064
CSR_WRITE_4(sc, ALC_MBOX_TD_PROD_IDX,
sys/dev/pci/if_alc.c
2167
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
218
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
2331
CSR_WRITE_4(sc, ALC_INTR_STATUS, status | INTR_DIS_INT);
sys/dev/pci/if_alc.c
2364
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0x7FFFFFFF);
sys/dev/pci/if_alc.c
250
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
2533
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX,
sys/dev/pci/if_alc.c
2676
CSR_WRITE_4(sc, ALC_MISC3, reg);
sys/dev/pci/if_alc.c
2687
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2688
CSR_WRITE_4(sc, ALC_MISC, reg | MISC_INTNLOSC_OPEN);
sys/dev/pci/if_alc.c
2691
CSR_WRITE_4(sc, ALC_MISC2, reg);
sys/dev/pci/if_alc.c
2692
CSR_WRITE_4(sc, ALC_MISC2, reg | MISC2_CALB_START);
sys/dev/pci/if_alc.c
2699
CSR_WRITE_4(sc, ALC_MISC, reg | MISC_INTNLOSC_OPEN);
sys/dev/pci/if_alc.c
2700
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2715
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX, 1);
sys/dev/pci/if_alc.c
2724
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
2730
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2765
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2769
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
2776
CSR_WRITE_4(sc, ALC_MISC3, reg);
sys/dev/pci/if_alc.c
2781
CSR_WRITE_4(sc, ALC_MISC, reg);
sys/dev/pci/if_alc.c
2787
CSR_WRITE_4(sc, ALC_SERDES_LOCK,
sys/dev/pci/if_alc.c
2832
CSR_WRITE_4(sc, ALC_CLK_GATING_CFG, CLK_GATING_DMAW_ENB |
sys/dev/pci/if_alc.c
2837
CSR_WRITE_4(sc, ALC_IDLE_DECISN_TIMER,
sys/dev/pci/if_alc.c
2840
CSR_WRITE_4(sc, ALC_CLK_GATING_CFG, 0);
sys/dev/pci/if_alc.c
2844
CSR_WRITE_4(sc, ALC_PAR0, (uint32_t)eaddr[2] << 24
sys/dev/pci/if_alc.c
2846
CSR_WRITE_4(sc, ALC_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_alc.c
2852
CSR_WRITE_4(sc, ALC_WOL_CFG, 0);
sys/dev/pci/if_alc.c
2855
CSR_WRITE_4(sc, ALC_TX_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2856
CSR_WRITE_4(sc, ALC_TDL_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2858
CSR_WRITE_4(sc, ALC_TDH_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2860
CSR_WRITE_4(sc, ALC_TD_RING_CNT,
sys/dev/pci/if_alc.c
2864
CSR_WRITE_4(sc, ALC_RX_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2865
CSR_WRITE_4(sc, ALC_RD0_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2868
CSR_WRITE_4(sc, ALC_RD1_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2869
CSR_WRITE_4(sc, ALC_RD2_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2870
CSR_WRITE_4(sc, ALC_RD3_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2873
CSR_WRITE_4(sc, ALC_RD_RING_CNT,
sys/dev/pci/if_alc.c
2887
CSR_WRITE_4(sc, ALC_RX_BUF_SIZE, sc->alc_buf_size);
sys/dev/pci/if_alc.c
289
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
2891
CSR_WRITE_4(sc, ALC_RRD0_HEAD_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2894
CSR_WRITE_4(sc, ALC_RRD1_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2895
CSR_WRITE_4(sc, ALC_RRD2_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2896
CSR_WRITE_4(sc, ALC_RRD3_HEAD_ADDR_LO, 0);
sys/dev/pci/if_alc.c
2899
CSR_WRITE_4(sc, ALC_RRD_RING_CNT,
sys/dev/pci/if_alc.c
2902
CSR_WRITE_4(sc, ALC_CMB_BASE_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2904
CSR_WRITE_4(sc, ALC_SMB_BASE_ADDR_HI, ALC_ADDR_HI(paddr));
sys/dev/pci/if_alc.c
2905
CSR_WRITE_4(sc, ALC_SMB_BASE_ADDR_LO, ALC_ADDR_LO(paddr));
sys/dev/pci/if_alc.c
2909
CSR_WRITE_4(sc, ALC_SRAM_RX_FIFO_LEN, 0x000002A0);
sys/dev/pci/if_alc.c
2910
CSR_WRITE_4(sc, ALC_SRAM_TX_FIFO_LEN, 0x00000100);
sys/dev/pci/if_alc.c
2911
CSR_WRITE_4(sc, ALC_SRAM_RX_FIFO_ADDR, 0x029F0000);
sys/dev/pci/if_alc.c
2912
CSR_WRITE_4(sc, ALC_SRAM_RD0_ADDR, 0x02BF02A0);
sys/dev/pci/if_alc.c
2913
CSR_WRITE_4(sc, ALC_SRAM_TX_FIFO_ADDR, 0x03BF02C0);
sys/dev/pci/if_alc.c
2914
CSR_WRITE_4(sc, ALC_SRAM_TD_ADDR, 0x03DF03C0);
sys/dev/pci/if_alc.c
2915
CSR_WRITE_4(sc, ALC_TXF_WATER_MARK, 0x00000000);
sys/dev/pci/if_alc.c
2916
CSR_WRITE_4(sc, ALC_RD_DMA_CFG, 0x00000000);
sys/dev/pci/if_alc.c
2920
CSR_WRITE_4(sc, ALC_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_alc.c
2928
CSR_WRITE_4(sc, ALC_IM_TIMER, reg);
sys/dev/pci/if_alc.c
2941
CSR_WRITE_4(sc, ALC_MASTER_CFG, reg);
sys/dev/pci/if_alc.c
2946
CSR_WRITE_4(sc, ALC_INTR_RETRIG_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2949
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, ALC_TX_RING_CNT / 3);
sys/dev/pci/if_alc.c
2950
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER,
sys/dev/pci/if_alc.c
2954
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, 4);
sys/dev/pci/if_alc.c
2955
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(5000));
sys/dev/pci/if_alc.c
2957
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2965
CSR_WRITE_4(sc, ALC_SMB_STAT_TIMER, ALC_USECS(0));
sys/dev/pci/if_alc.c
2983
CSR_WRITE_4(sc, ALC_FRAME_SIZE, sc->alc_ident->max_framelen);
sys/dev/pci/if_alc.c
2987
CSR_WRITE_4(sc, ALC_HDS_CFG, 0);
sys/dev/pci/if_alc.c
2990
CSR_WRITE_4(sc, ALC_IPG_IFG_CFG,
sys/dev/pci/if_alc.c
3000
CSR_WRITE_4(sc, ALC_HDPX_CFG,
sys/dev/pci/if_alc.c
3020
CSR_WRITE_4(sc, ALC_TSO_OFFLOAD_THRESH, reg);
sys/dev/pci/if_alc.c
3030
CSR_WRITE_4(sc, ALC_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE);
sys/dev/pci/if_alc.c
3036
CSR_WRITE_4(sc, ALC_HQTD_CFG, reg);
sys/dev/pci/if_alc.c
3042
CSR_WRITE_4(sc, ALC_WRR, reg);
sys/dev/pci/if_alc.c
3045
CSR_WRITE_4(sc, ALC_RX_RD_FREE_THRESH,
sys/dev/pci/if_alc.c
3066
CSR_WRITE_4(sc, ALC_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_alc.c
3077
CSR_WRITE_4(sc, ALC_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_alc.c
3086
CSR_WRITE_4(sc, ALC_RSS_IDT_TABLE0, 0);
sys/dev/pci/if_alc.c
3087
CSR_WRITE_4(sc, ALC_RSS_CPU, 0);
sys/dev/pci/if_alc.c
3105
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3137
CSR_WRITE_4(sc, ALC_DMA_CFG, reg);
sys/dev/pci/if_alc.c
3164
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3171
CSR_WRITE_4(sc, ALC_INTR_MASK, ALC_INTRS);
sys/dev/pci/if_alc.c
3172
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3173
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0);
sys/dev/pci/if_alc.c
318
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
3212
CSR_WRITE_4(sc, ALC_INTR_MASK, 0);
sys/dev/pci/if_alc.c
3213
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3219
CSR_WRITE_4(sc, ALC_DMA_CFG, reg);
sys/dev/pci/if_alc.c
3226
CSR_WRITE_4(sc, ALC_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_alc.c
3270
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3302
CSR_WRITE_4(sc, ALC_RXQ_CFG, cfg);
sys/dev/pci/if_alc.c
3306
CSR_WRITE_4(sc, ALC_TXQ_CFG, cfg);
sys/dev/pci/if_alc.c
3320
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3325
CSR_WRITE_4(sc, ALC_RXQ_CFG, reg);
sys/dev/pci/if_alc.c
3332
CSR_WRITE_4(sc, ALC_TXQ_CFG, reg);
sys/dev/pci/if_alc.c
3394
CSR_WRITE_4(sc, ALC_MBOX_RD0_PROD_IDX, sc->alc_cdata.alc_rx_cons);
sys/dev/pci/if_alc.c
3448
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
3502
CSR_WRITE_4(sc, ALC_MAR0, mchash[0]);
sys/dev/pci/if_alc.c
3503
CSR_WRITE_4(sc, ALC_MAR1, mchash[1]);
sys/dev/pci/if_alc.c
3504
CSR_WRITE_4(sc, ALC_MAC_CFG, rxcfg);
sys/dev/pci/if_alc.c
373
CSR_WRITE_4(sc, ALC_MAC_CFG, reg);
sys/dev/pci/if_alc.c
415
CSR_WRITE_4(sc, ALC_EXT_MDIO, EXT_MDIO_REG(reg) |
sys/dev/pci/if_alc.c
421
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_alc.c
446
CSR_WRITE_4(sc, ALC_EXT_MDIO, EXT_MDIO_REG(reg) |
sys/dev/pci/if_alc.c
452
CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_alc.c
632
CSR_WRITE_4(sc, ALC_OPT_CFG, opt);
sys/dev/pci/if_alc.c
657
CSR_WRITE_4(sc, ALC_LTSSM_ID_CFG,
sys/dev/pci/if_alc.c
659
CSR_WRITE_4(sc, ALC_WOL_CFG, 0);
sys/dev/pci/if_alc.c
662
CSR_WRITE_4(sc, ALC_TWSI_CFG, CSR_READ_4(sc, ALC_TWSI_CFG) |
sys/dev/pci/if_alc.c
683
CSR_WRITE_4(sc, ALC_OPT_CFG, opt);
sys/dev/pci/if_alc.c
727
CSR_WRITE_4(sc, ALC_SLD, reg | SLD_START);
sys/dev/pci/if_alc.c
754
CSR_WRITE_4(sc, ALC_EEPROM_LD, reg |
sys/dev/pci/if_alc.c
799
CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
sys/dev/pci/if_alc.c
944
CSR_WRITE_4(sc, ALC_GPHY_CFG, val);
sys/dev/pci/if_alc.c
946
CSR_WRITE_4(sc, ALC_GPHY_CFG, val | GPHY_CFG_EXT_RESET);
sys/dev/pci/if_alc.c
967
CSR_WRITE_4(sc, ALC_LPI_CTL, val);
sys/dev/pci/if_ale.c
1079
CSR_WRITE_4(sc, ALE_MBOX_TPD_PROD_IDX,
sys/dev/pci/if_ale.c
1155
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
1295
CSR_WRITE_4(sc, ALE_INTR_STATUS, status | INTR_DIS_INT);
sys/dev/pci/if_ale.c
1323
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0x7FFFFFFF);
sys/dev/pci/if_ale.c
151
CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
sys/dev/pci/if_ale.c
1580
CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
sys/dev/pci/if_ale.c
1582
CSR_WRITE_4(sc, ALE_MASTER_CFG, MASTER_RESET);
sys/dev/pci/if_ale.c
1627
CSR_WRITE_4(sc, ALE_PAR0,
sys/dev/pci/if_ale.c
1629
CSR_WRITE_4(sc, ALE_PAR1, eaddr[0] << 8 | eaddr[1]);
sys/dev/pci/if_ale.c
1636
CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
sys/dev/pci/if_ale.c
1643
CSR_WRITE_4(sc, ALE_TPD_ADDR_HI, ALE_ADDR_HI(paddr));
sys/dev/pci/if_ale.c
1644
CSR_WRITE_4(sc, ALE_TPD_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1645
CSR_WRITE_4(sc, ALE_TPD_CNT,
sys/dev/pci/if_ale.c
1650
CSR_WRITE_4(sc, ALE_RXF0_PAGE0_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1652
CSR_WRITE_4(sc, ALE_RXF0_PAGE1_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1656
CSR_WRITE_4(sc, ALE_TX_CMB_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1658
CSR_WRITE_4(sc, ALE_RXF0_CMB0_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1660
CSR_WRITE_4(sc, ALE_RXF0_CMB1_ADDR_LO, ALE_ADDR_LO(paddr));
sys/dev/pci/if_ale.c
1671
CSR_WRITE_4(sc, ALE_RXF_PAGE_SIZE, ALE_RX_PAGE_SZ);
sys/dev/pci/if_ale.c
1674
CSR_WRITE_4(sc, ALE_DMA_BLOCK, DMA_BLOCK_LOAD);
sys/dev/pci/if_ale.c
1677
CSR_WRITE_4(sc, ALE_INT_TRIG_THRESH, (1 << INT_TRIG_RX_THRESH_SHIFT) |
sys/dev/pci/if_ale.c
1684
CSR_WRITE_4(sc, ALE_INT_TRIG_TIMER,
sys/dev/pci/if_ale.c
1693
CSR_WRITE_4(sc, ALE_IM_TIMER, reg);
sys/dev/pci/if_ale.c
1701
CSR_WRITE_4(sc, ALE_MASTER_CFG, reg);
sys/dev/pci/if_ale.c
1710
CSR_WRITE_4(sc, ALE_FRAME_SIZE, sc->ale_max_frame_size);
sys/dev/pci/if_ale.c
1713
CSR_WRITE_4(sc, ALE_IPG_IFG_CFG,
sys/dev/pci/if_ale.c
1720
CSR_WRITE_4(sc, ALE_HDPX_CFG,
sys/dev/pci/if_ale.c
1738
CSR_WRITE_4(sc, ALE_TX_JUMBO_THRESH,
sys/dev/pci/if_ale.c
1748
CSR_WRITE_4(sc, ALE_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE | TXQ_CFG_ENB);
sys/dev/pci/if_ale.c
1753
CSR_WRITE_4(sc, ALE_RX_JUMBO_THRESH,
sys/dev/pci/if_ale.c
1761
CSR_WRITE_4(sc, ALE_RX_FIFO_PAUSE_THRESH,
sys/dev/pci/if_ale.c
1769
CSR_WRITE_4(sc, ALE_RSS_IDT_TABLE0, 0);
sys/dev/pci/if_ale.c
1770
CSR_WRITE_4(sc, ALE_RSS_CPU, 0);
sys/dev/pci/if_ale.c
1773
CSR_WRITE_4(sc, ALE_RXQ_CFG,
sys/dev/pci/if_ale.c
1780
CSR_WRITE_4(sc, ALE_DMA_CFG,
sys/dev/pci/if_ale.c
1795
CSR_WRITE_4(sc, ALE_SMB_STAT_TIMER, ALE_USECS(0));
sys/dev/pci/if_ale.c
1818
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
1825
CSR_WRITE_4(sc, ALE_INTR_MASK, ALE_INTRS);
sys/dev/pci/if_ale.c
1826
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1827
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0);
sys/dev/pci/if_ale.c
1866
CSR_WRITE_4(sc, ALE_INTR_MASK, 0);
sys/dev/pci/if_ale.c
1867
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1872
CSR_WRITE_4(sc, ALE_TXQ_CFG, reg);
sys/dev/pci/if_ale.c
1875
CSR_WRITE_4(sc, ALE_RXQ_CFG, reg);
sys/dev/pci/if_ale.c
1878
CSR_WRITE_4(sc, ALE_DMA_CFG, reg);
sys/dev/pci/if_ale.c
1885
CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
sys/dev/pci/if_ale.c
1909
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
191
CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
sys/dev/pci/if_ale.c
1977
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
2031
CSR_WRITE_4(sc, ALE_MAR0, mchash[0]);
sys/dev/pci/if_ale.c
2032
CSR_WRITE_4(sc, ALE_MAR1, mchash[1]);
sys/dev/pci/if_ale.c
2033
CSR_WRITE_4(sc, ALE_MAC_CFG, rxcfg);
sys/dev/pci/if_ale.c
248
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
sys/dev/pci/if_ale.c
299
CSR_WRITE_4(sc, ALE_SPI_CTRL, reg);
sys/dev/pci/if_ale.c
308
CSR_WRITE_4(sc, ALE_TWSI_CTRL, CSR_READ_4(sc, ALE_TWSI_CTRL) |
sys/dev/pci/if_bge.c
1041
CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr);
sys/dev/pci/if_bge.c
1247
CSR_WRITE_4(sc, BGE_TX_MODE, tx_mode);
sys/dev/pci/if_bge.c
1248
CSR_WRITE_4(sc, BGE_RX_MODE, rx_mode);
sys/dev/pci/if_bge.c
1697
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sys/dev/pci/if_bge.c
1889
CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), hashes[i]);
sys/dev/pci/if_bge.c
2121
CSR_WRITE_4(sc, BGE_MODE_CTL, reg | BGE_MODECTL_PCIE_TLPADDR1);
sys/dev/pci/if_bge.c
2126
CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG + BGE_TLP_PHYCTL1,
sys/dev/pci/if_bge.c
2130
CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
sys/dev/pci/if_bge.c
2140
CSR_WRITE_4(sc, BGE_MODE_CTL,
sys/dev/pci/if_bge.c
2146
CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG + BGE_TLP_PHYCTL5,
sys/dev/pci/if_bge.c
2150
CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
sys/dev/pci/if_bge.c
2159
CSR_WRITE_4(sc, BGE_CPMU_PADRNG_CTL,
sys/dev/pci/if_bge.c
2167
CSR_WRITE_4(sc, BGE_MODE_CTL,
sys/dev/pci/if_bge.c
2174
CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG + BGE_TLP_FTSMAX,
sys/dev/pci/if_bge.c
2178
CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
sys/dev/pci/if_bge.c
2184
CSR_WRITE_4(sc, BGE_CPMU_LSPD_10MB_CLK, reg);
sys/dev/pci/if_bge.c
2314
CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
sys/dev/pci/if_bge.c
2368
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR, BGE_BUFFPOOL_1);
sys/dev/pci/if_bge.c
2371
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000);
sys/dev/pci/if_bge.c
2373
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000);
sys/dev/pci/if_bge.c
2377
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR,
sys/dev/pci/if_bge.c
2379
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000);
sys/dev/pci/if_bge.c
2388
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
sys/dev/pci/if_bge.c
2390
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x7e);
sys/dev/pci/if_bge.c
2391
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xea);
sys/dev/pci/if_bge.c
2393
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
sys/dev/pci/if_bge.c
2394
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
sys/dev/pci/if_bge.c
2397
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
sys/dev/pci/if_bge.c
2400
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x04);
sys/dev/pci/if_bge.c
2401
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x10);
sys/dev/pci/if_bge.c
2403
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
sys/dev/pci/if_bge.c
2404
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sys/dev/pci/if_bge.c
2407
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50);
sys/dev/pci/if_bge.c
2408
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20);
sys/dev/pci/if_bge.c
2409
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sys/dev/pci/if_bge.c
2414
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5);
sys/dev/pci/if_bge.c
2415
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10);
sys/dev/pci/if_bge.c
2432
CSR_WRITE_4(sc, BGE_BMAN_MODE, val);
sys/dev/pci/if_bge.c
2450
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
2451
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sys/dev/pci/if_bge.c
2537
CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2538
CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2539
CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sys/dev/pci/if_bge.c
2540
CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr);
sys/dev/pci/if_bge.c
2565
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI,
sys/dev/pci/if_bge.c
2567
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO,
sys/dev/pci/if_bge.c
2570
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS,
sys/dev/pci/if_bge.c
2572
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr);
sys/dev/pci/if_bge.c
2584
CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS,
sys/dev/pci/if_bge.c
2600
CSR_WRITE_4(sc, BGE_ISO_PKT_TX,
sys/dev/pci/if_bge.c
2617
CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, 8);
sys/dev/pci/if_bge.c
2619
CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, 8);
sys/dev/pci/if_bge.c
2623
CSR_WRITE_4(sc, BGE_STD_REPL_LWM, 4);
sys/dev/pci/if_bge.c
2624
CSR_WRITE_4(sc, BGE_JUMBO_REPL_LWM, 4);
sys/dev/pci/if_bge.c
2714
CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF,
sys/dev/pci/if_bge.c
2727
CSR_WRITE_4(sc, BGE_TX_LENGTHS, val);
sys/dev/pci/if_bge.c
2734
CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08);
sys/dev/pci/if_bge.c
2741
CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181);
sys/dev/pci/if_bge.c
2748
CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, val);
sys/dev/pci/if_bge.c
2750
CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007FFFFF);
sys/dev/pci/if_bge.c
2753
CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1);
sys/dev/pci/if_bge.c
2757
CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000);
sys/dev/pci/if_bge.c
2781
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, rx_coal_ticks);
sys/dev/pci/if_bge.c
2782
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, tx_coal_ticks);
sys/dev/pci/if_bge.c
2783
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, rx_max_coal_bds);
sys/dev/pci/if_bge.c
2784
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, tx_max_coal_bds);
sys/dev/pci/if_bge.c
2786
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0);
sys/dev/pci/if_bge.c
2787
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0);
sys/dev/pci/if_bge.c
2789
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 0);
sys/dev/pci/if_bge.c
2790
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0);
sys/dev/pci/if_bge.c
2795
CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks);
sys/dev/pci/if_bge.c
2796
CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK);
sys/dev/pci/if_bge.c
2797
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, taddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2798
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO, taddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2804
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK);
sys/dev/pci/if_bge.c
2805
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI, taddr.bge_addr_hi);
sys/dev/pci/if_bge.c
2806
CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO, taddr.bge_addr_lo);
sys/dev/pci/if_bge.c
2822
CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);
sys/dev/pci/if_bge.c
2826
CSR_WRITE_4(sc, BGE_RBDC_MODE,
sys/dev/pci/if_bge.c
2831
CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
sys/dev/pci/if_bge.c
2836
CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
sys/dev/pci/if_bge.c
2872
CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
sys/dev/pci/if_bge.c
2953
CSR_WRITE_4(sc, rdmareg, dmactl |
sys/dev/pci/if_bge.c
2958
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL,
sys/dev/pci/if_bge.c
2967
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL,
sys/dev/pci/if_bge.c
2972
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL_REG2,
sys/dev/pci/if_bge.c
2996
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/pci/if_bge.c
3002
CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
sys/dev/pci/if_bge.c
3005
CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
3010
CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
sys/dev/pci/if_bge.c
3017
CSR_WRITE_4(sc, BGE_SDC_MODE, val);
sys/dev/pci/if_bge.c
3021
CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
sys/dev/pci/if_bge.c
3025
CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
3031
CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE |
sys/dev/pci/if_bge.c
3034
CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
sys/dev/pci/if_bge.c
3038
CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
sys/dev/pci/if_bge.c
3042
CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
sys/dev/pci/if_bge.c
3045
CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007FFFFF);
sys/dev/pci/if_bge.c
3047
CSR_WRITE_4(sc, BGE_SDI_STATS_CTL,
sys/dev/pci/if_bge.c
3051
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED |
sys/dev/pci/if_bge.c
3054
CSR_WRITE_4(sc, BGE_MI_STS, 0);
sys/dev/pci/if_bge.c
3061
CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
sys/dev/pci/if_bge.c
3074
CSR_WRITE_4(sc, BGE_MI_MODE, mimode);
sys/dev/pci/if_bge.c
3076
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sys/dev/pci/if_bge.c
3087
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED |
sys/dev/pci/if_bge.c
4225
CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1);
sys/dev/pci/if_bge.c
4255
CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0);
sys/dev/pci/if_bge.c
4269
CSR_WRITE_4(sc, BGE_PCIE_LINKCTL, val);
sys/dev/pci/if_bge.c
4283
CSR_WRITE_4(sc, BGE_PHY_TEST_CTRL_REG,
sys/dev/pci/if_bge.c
4291
CSR_WRITE_4(sc, BGE_MISC_CFG, 1 << 29);
sys/dev/pci/if_bge.c
4298
CSR_WRITE_4(sc, BGE_VCPU_STATUS,
sys/dev/pci/if_bge.c
4301
CSR_WRITE_4(sc, BGE_VCPU_EXT_CTRL,
sys/dev/pci/if_bge.c
4397
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);
sys/dev/pci/if_bge.c
4399
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
sys/dev/pci/if_bge.c
4411
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS);
sys/dev/pci/if_bge.c
4449
CSR_WRITE_4(sc, BGE_SERDES_CFG, serdescfg);
sys/dev/pci/if_bge.c
4460
CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG,
sys/dev/pci/if_bge.c
4809
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, rx_ticks);
sys/dev/pci/if_bge.c
4813
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, rx_bds);
sys/dev/pci/if_bge.c
4947
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/pci/if_bge.c
5617
CSR_WRITE_4(sc, BGE_CPMU_CTRL, reg);
sys/dev/pci/if_bge.c
5622
CSR_WRITE_4(sc, BGE_CPMU_LSPD_10MB_CLK, reg);
sys/dev/pci/if_bge.c
5627
CSR_WRITE_4(sc, BGE_CPMU_LNK_AWARE_PWRMD, reg);
sys/dev/pci/if_bge.c
5632
CSR_WRITE_4(sc, BGE_CPMU_HST_ACC, reg);
sys/dev/pci/if_bge.c
5642
CSR_WRITE_4(sc, BGE_PCIE_PWRMNG_THRESH, reg);
sys/dev/pci/if_bge.c
5647
CSR_WRITE_4(sc, BGE_PCIE_EIDLE_DELAY, reg);
sys/dev/pci/if_bge.c
5658
CSR_WRITE_4(sc, BGE_PCIE_LINKCTL, reg);
sys/dev/pci/if_bge.c
5678
CSR_WRITE_4(sc, BGE_RX_MTU, ifp->if_mtu +
sys/dev/pci/if_bge.c
5684
CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
sys/dev/pci/if_bge.c
5685
CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI,
sys/dev/pci/if_bge.c
5824
CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
sys/dev/pci/if_bge.c
5861
CSR_WRITE_4(sc, BGE_CPMU_CTRL, reg);
sys/dev/pci/if_bge.c
5877
CSR_WRITE_4(sc, BGE_CPMU_LSPD_1000MB_CLK, reg);
sys/dev/pci/if_bge.c
6049
CSR_WRITE_4(sc, BGE_RX_STS, status);
sys/dev/pci/if_bge.c
6058
CSR_WRITE_4(sc, BGE_RX_STS, status);
sys/dev/pci/if_bge.c
607
CSR_WRITE_4(sc, off, val);
sys/dev/pci/if_bge.c
616
CSR_WRITE_4(sc, off, val);
sys/dev/pci/if_bge.c
6207
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
6208
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sys/dev/pci/if_bge.c
6299
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sys/dev/pci/if_bge.c
6320
CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
sys/dev/pci/if_bge.c
6371
CSR_WRITE_4(sc, BGE_MISC_CFG, reg);
sys/dev/pci/if_bge.c
6374
CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED |
sys/dev/pci/if_bge.c
953
CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1);
sys/dev/pci/if_bge.c
964
CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access | BGE_NVRAMACC_ENABLE);
sys/dev/pci/if_bge.c
966
CSR_WRITE_4(sc, BGE_NVRAM_ADDR, addr & 0xfffffffc);
sys/dev/pci/if_bge.c
967
CSR_WRITE_4(sc, BGE_NVRAM_CMD, BGE_NVRAM_READCMD);
sys/dev/pci/if_bge.c
987
CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access);
sys/dev/pci/if_bgereg.h
2233
CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \
sys/dev/pci/if_bgevar.h
108
CSR_WRITE_4(sc, reg, val); \
sys/dev/pci/if_bgevar.h
113
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | (x)))
sys/dev/pci/if_bgevar.h
120
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~(x)))
sys/dev/pci/if_et.c
1001
CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
sys/dev/pci/if_et.c
1004
CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
sys/dev/pci/if_et.c
1007
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
1010
CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
sys/dev/pci/if_et.c
1037
CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
sys/dev/pci/if_et.c
1088
CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
sys/dev/pci/if_et.c
1207
CSR_WRITE_4(sc, ET_RXDMA_CTRL,
sys/dev/pci/if_et.c
1222
CSR_WRITE_4(sc, ET_TXDMA_CTRL,
sys/dev/pci/if_et.c
1323
CSR_WRITE_4(sc, ET_MULTI_HASH + (i * 4), hash[i]);
sys/dev/pci/if_et.c
1329
CSR_WRITE_4(sc, ET_PKTFILT, pktfilt);
sys/dev/pci/if_et.c
1330
CSR_WRITE_4(sc, ET_RXMAC_CTRL, rxmac_ctrl);
sys/dev/pci/if_et.c
1349
CSR_WRITE_4(sc, ET_RXQ_START, 0);
sys/dev/pci/if_et.c
1350
CSR_WRITE_4(sc, ET_RXQ_END, rxq_end);
sys/dev/pci/if_et.c
1351
CSR_WRITE_4(sc, ET_TXQ_START, rxq_end + 1);
sys/dev/pci/if_et.c
1352
CSR_WRITE_4(sc, ET_TXQ_END, ET_INTERN_MEM_END);
sys/dev/pci/if_et.c
1355
CSR_WRITE_4(sc, ET_LOOPBACK, 0);
sys/dev/pci/if_et.c
1358
CSR_WRITE_4(sc, ET_MSI_CFG, 0);
sys/dev/pci/if_et.c
1361
CSR_WRITE_4(sc, ET_TIMER, 0);
sys/dev/pci/if_et.c
1367
CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
sys/dev/pci/if_et.c
1458
CSR_WRITE_4(sc, ET_RX_STATUS_HI, ET_ADDR_HI(rxsd->rxsd_paddr));
sys/dev/pci/if_et.c
1459
CSR_WRITE_4(sc, ET_RX_STATUS_LO, ET_ADDR_LO(rxsd->rxsd_paddr));
sys/dev/pci/if_et.c
1464
CSR_WRITE_4(sc, ET_RXSTAT_HI, ET_ADDR_HI(rxst_ring->rsr_paddr));
sys/dev/pci/if_et.c
1465
CSR_WRITE_4(sc, ET_RXSTAT_LO, ET_ADDR_LO(rxst_ring->rsr_paddr));
sys/dev/pci/if_et.c
1466
CSR_WRITE_4(sc, ET_RXSTAT_CNT, ET_RX_NSTAT - 1);
sys/dev/pci/if_et.c
1467
CSR_WRITE_4(sc, ET_RXSTAT_POS, 0);
sys/dev/pci/if_et.c
1468
CSR_WRITE_4(sc, ET_RXSTAT_MINCNT, ((ET_RX_NSTAT * 15) / 100) - 1);
sys/dev/pci/if_et.c
1478
CSR_WRITE_4(sc, ET_RX_RING1_HI, ET_ADDR_HI(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1479
CSR_WRITE_4(sc, ET_RX_RING1_LO, ET_ADDR_LO(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1480
CSR_WRITE_4(sc, ET_RX_RING1_CNT, ET_RX_NDESC - 1);
sys/dev/pci/if_et.c
1481
CSR_WRITE_4(sc, ET_RX_RING1_POS, ET_RX_RING1_POS_WRAP);
sys/dev/pci/if_et.c
1482
CSR_WRITE_4(sc, ET_RX_RING1_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
sys/dev/pci/if_et.c
1492
CSR_WRITE_4(sc, ET_RX_RING0_HI, ET_ADDR_HI(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1493
CSR_WRITE_4(sc, ET_RX_RING0_LO, ET_ADDR_LO(rx_ring->rr_paddr));
sys/dev/pci/if_et.c
1494
CSR_WRITE_4(sc, ET_RX_RING0_CNT, ET_RX_NDESC - 1);
sys/dev/pci/if_et.c
1495
CSR_WRITE_4(sc, ET_RX_RING0_POS, ET_RX_RING0_POS_WRAP);
sys/dev/pci/if_et.c
1496
CSR_WRITE_4(sc, ET_RX_RING0_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
sys/dev/pci/if_et.c
1505
CSR_WRITE_4(sc, ET_RX_INTR_NPKTS, sc->sc_rx_intr_npkts);
sys/dev/pci/if_et.c
1506
CSR_WRITE_4(sc, ET_RX_INTR_DELAY, sc->sc_rx_intr_delay);
sys/dev/pci/if_et.c
1527
CSR_WRITE_4(sc, ET_TX_RING_HI, ET_ADDR_HI(tx_ring->tr_paddr));
sys/dev/pci/if_et.c
1528
CSR_WRITE_4(sc, ET_TX_RING_LO, ET_ADDR_LO(tx_ring->tr_paddr));
sys/dev/pci/if_et.c
1529
CSR_WRITE_4(sc, ET_TX_RING_CNT, ET_TX_NDESC - 1);
sys/dev/pci/if_et.c
1534
CSR_WRITE_4(sc, ET_TX_STATUS_HI, ET_ADDR_HI(txsd->txsd_paddr));
sys/dev/pci/if_et.c
1535
CSR_WRITE_4(sc, ET_TX_STATUS_LO, ET_ADDR_LO(txsd->txsd_paddr));
sys/dev/pci/if_et.c
1537
CSR_WRITE_4(sc, ET_TX_READY_POS, 0);
sys/dev/pci/if_et.c
1554
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
1566
CSR_WRITE_4(sc, ET_IPG, val);
sys/dev/pci/if_et.c
1575
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/pci/if_et.c
1578
CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
sys/dev/pci/if_et.c
1581
CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
sys/dev/pci/if_et.c
1587
CSR_WRITE_4(sc, ET_MAC_ADDR1, val);
sys/dev/pci/if_et.c
1589
CSR_WRITE_4(sc, ET_MAC_ADDR2, val);
sys/dev/pci/if_et.c
1592
CSR_WRITE_4(sc, ET_MAX_FRMLEN,
sys/dev/pci/if_et.c
1596
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
1608
CSR_WRITE_4(sc, ET_RXMAC_CTRL, ET_RXMAC_CTRL_WOL_DISABLE);
sys/dev/pci/if_et.c
1614
CSR_WRITE_4(sc, ET_WOL_CRC + (i * 4), 0);
sys/dev/pci/if_et.c
1616
CSR_WRITE_4(sc, ET_WOL_MASK + (i * 4), 0);
sys/dev/pci/if_et.c
1622
CSR_WRITE_4(sc, ET_WOL_SA_LO, val);
sys/dev/pci/if_et.c
1624
CSR_WRITE_4(sc, ET_WOL_SA_HI, val);
sys/dev/pci/if_et.c
1627
CSR_WRITE_4(sc, ET_PKTFILT, 0);
sys/dev/pci/if_et.c
1630
CSR_WRITE_4(sc, ET_UCAST_FILTADDR1, 0);
sys/dev/pci/if_et.c
1631
CSR_WRITE_4(sc, ET_UCAST_FILTADDR2, 0);
sys/dev/pci/if_et.c
1632
CSR_WRITE_4(sc, ET_UCAST_FILTADDR3, 0);
sys/dev/pci/if_et.c
1649
CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);
sys/dev/pci/if_et.c
1651
CSR_WRITE_4(sc, ET_RXMAC_MC_WATERMARK, 0);
sys/dev/pci/if_et.c
1654
CSR_WRITE_4(sc, ET_RXMAC_MGT, 0);
sys/dev/pci/if_et.c
1656
CSR_WRITE_4(sc, ET_RXMAC_SPACE_AVL, 0);
sys/dev/pci/if_et.c
1658
CSR_WRITE_4(sc, ET_RXMAC_MGT,
sys/dev/pci/if_et.c
1668
CSR_WRITE_4(sc, ET_PKTFILT, val);
sys/dev/pci/if_et.c
1671
CSR_WRITE_4(sc, ET_RXMAC_CTRL,
sys/dev/pci/if_et.c
1685
CSR_WRITE_4(sc, ET_TXMAC_CTRL, ET_TXMAC_CTRL_FC_DISABLE);
sys/dev/pci/if_et.c
1688
CSR_WRITE_4(sc, ET_TXMAC_FLOWCTRL, 0);
sys/dev/pci/if_et.c
1691
CSR_WRITE_4(sc, ET_TXMAC_CTRL,
sys/dev/pci/if_et.c
1707
CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);
sys/dev/pci/if_et.c
1722
CSR_WRITE_4(sc, ET_TXDMA_CTRL, ET_TXDMA_CTRL_SINGLE_EPKT);
sys/dev/pci/if_et.c
1772
CSR_WRITE_4(sc, ET_RXSTAT_POS, rxstat_pos);
sys/dev/pci/if_et.c
1824
CSR_WRITE_4(sc, rx_ring->rr_posreg, rxring_pos);
sys/dev/pci/if_et.c
1952
CSR_WRITE_4(sc, ET_TX_READY_POS, tx_ready_pos);
sys/dev/pci/if_et.c
243
CSR_WRITE_4(sc, ET_PM, pmcfg);
sys/dev/pci/if_et.c
368
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
372
CSR_WRITE_4(sc, ET_MII_ADDR, data);
sys/dev/pci/if_et.c
375
CSR_WRITE_4(sc, ET_MII_CMD, ET_MII_CMD_READ);
sys/dev/pci/if_et.c
400
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
414
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
418
CSR_WRITE_4(sc, ET_MII_ADDR, data);
sys/dev/pci/if_et.c
421
CSR_WRITE_4(sc, ET_MII_CTRL, __SHIFTIN(val, ET_MII_CTRL_VALUE));
sys/dev/pci/if_et.c
441
CSR_WRITE_4(sc, ET_MII_CMD, 0);
sys/dev/pci/if_et.c
515
CSR_WRITE_4(sc, ET_MAC_CTRL, ctrl);
sys/dev/pci/if_et.c
516
CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2);
sys/dev/pci/if_et.c
518
CSR_WRITE_4(sc, ET_MAC_CFG1, cfg1);
sys/dev/pci/if_et.c
670
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
675
CSR_WRITE_4(sc, ET_SWRST,
sys/dev/pci/if_et.c
680
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
683
CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
sys/dev/pci/if_et.c
689
CSR_WRITE_4(sc, ET_INTR_MASK, 0xffffffff);
sys/dev/pci/if_et.c
695
CSR_WRITE_4(sc, ET_INTR_MASK, ~intrs);
sys/dev/pci/if_et.c
983
CSR_WRITE_4(sc, ET_LOOPBACK, 0);
sys/dev/pci/if_et.c
986
CSR_WRITE_4(sc, ET_MAC_CFG1,
sys/dev/pci/if_et.c
998
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/pci/if_ipw.c
1174
CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
sys/dev/pci/if_ipw.c
1260
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
1297
CSR_WRITE_4(sc, IPW_CSR_INTR, r);
sys/dev/pci/if_ipw.c
1301
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sys/dev/pci/if_ipw.c
1340
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
sys/dev/pci/if_ipw.c
138
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_ipw.c
145
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_ipw.c
1504
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
sys/dev/pci/if_ipw.c
1593
CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
sys/dev/pci/if_ipw.c
1743
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
1745
CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
sys/dev/pci/if_ipw.c
1754
CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
sys/dev/pci/if_ipw.c
1768
CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sys/dev/pci/if_ipw.c
1780
CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
sys/dev/pci/if_ipw.c
1785
CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sys/dev/pci/if_ipw.c
1800
CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sys/dev/pci/if_ipw.c
1863
CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
sys/dev/pci/if_ipw.c
1867
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sys/dev/pci/if_ipw.c
1870
CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sys/dev/pci/if_ipw.c
1872
CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sys/dev/pci/if_ipw.c
1883
CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
sys/dev/pci/if_ipw.c
209
CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sys/dev/pci/if_ipw.c
2216
CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_map->dm_segs[0].ds_addr);
sys/dev/pci/if_ipw.c
2217
CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD);
sys/dev/pci/if_ipw.c
2218
CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0);
sys/dev/pci/if_ipw.c
2219
CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur);
sys/dev/pci/if_ipw.c
2221
CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_map->dm_segs[0].ds_addr);
sys/dev/pci/if_ipw.c
2222
CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD);
sys/dev/pci/if_ipw.c
2223
CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0);
sys/dev/pci/if_ipw.c
2224
CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur);
sys/dev/pci/if_ipw.c
2226
CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_map->dm_segs[0].ds_addr);
sys/dev/pci/if_ipw.c
2266
CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
sys/dev/pci/if_ipw.c
2286
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sys/dev/pci/if_ipw.c
2296
CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sys/dev/pci/if_ipwreg.h
339
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
344
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
349
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_ipwreg.h
350
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_ipwreg.h
354
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwi.c
1200
CSR_WRITE_4(sc, IWI_CSR_RX_BASE + i * 4, data->map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
1381
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX,
sys/dev/pci/if_iwi.c
1429
CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, hw);
sys/dev/pci/if_iwi.c
1485
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sys/dev/pci/if_iwi.c
1502
CSR_WRITE_4(sc, IWI_CSR_INTR, r);
sys/dev/pci/if_iwi.c
153
CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_iwi.c
1550
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sys/dev/pci/if_iwi.c
1577
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur);
sys/dev/pci/if_iwi.c
160
CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sys/dev/pci/if_iwi.c
1759
CSR_WRITE_4(sc, txq->csr_widx, txq->cur);
sys/dev/pci/if_iwi.c
1954
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sys/dev/pci/if_iwi.c
1956
CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_STOP_MASTER);
sys/dev/pci/if_iwi.c
1965
CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sys/dev/pci/if_iwi.c
1979
CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sys/dev/pci/if_iwi.c
1983
CSR_WRITE_4(sc, IWI_CSR_READ_INT, IWI_READ_INT_INIT_HOST);
sys/dev/pci/if_iwi.c
1997
CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sys/dev/pci/if_iwi.c
2002
CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sys/dev/pci/if_iwi.c
2006
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0);
sys/dev/pci/if_iwi.c
2008
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sys/dev/pci/if_iwi.c
2019
CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sys/dev/pci/if_iwi.c
2033
CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
sys/dev/pci/if_iwi.c
2119
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0x27000);
sys/dev/pci/if_iwi.c
2148
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, ctl);
sys/dev/pci/if_iwi.c
2149
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, cs);
sys/dev/pci/if_iwi.c
2150
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, cd);
sys/dev/pci/if_iwi.c
2151
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, sum);
sys/dev/pci/if_iwi.c
2162
CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sys/dev/pci/if_iwi.c
2164
CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
sys/dev/pci/if_iwi.c
2186
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sys/dev/pci/if_iwi.c
2189
CSR_WRITE_4(sc, IWI_CSR_RST, 0);
sys/dev/pci/if_iwi.c
2190
CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sys/dev/pci/if_iwi.c
251
CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sys/dev/pci/if_iwi.c
2750
CSR_WRITE_4(sc, IWI_CSR_CMD_BASE, sc->cmdq.desc_map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2751
CSR_WRITE_4(sc, IWI_CSR_CMD_SIZE, sc->cmdq.count);
sys/dev/pci/if_iwi.c
2752
CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur);
sys/dev/pci/if_iwi.c
2754
CSR_WRITE_4(sc, IWI_CSR_TX1_BASE, sc->txq[0].desc_map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2755
CSR_WRITE_4(sc, IWI_CSR_TX1_SIZE, sc->txq[0].count);
sys/dev/pci/if_iwi.c
2756
CSR_WRITE_4(sc, IWI_CSR_TX1_WIDX, sc->txq[0].cur);
sys/dev/pci/if_iwi.c
2758
CSR_WRITE_4(sc, IWI_CSR_TX2_BASE, sc->txq[1].desc_map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2759
CSR_WRITE_4(sc, IWI_CSR_TX2_SIZE, sc->txq[1].count);
sys/dev/pci/if_iwi.c
2760
CSR_WRITE_4(sc, IWI_CSR_TX2_WIDX, sc->txq[1].cur);
sys/dev/pci/if_iwi.c
2762
CSR_WRITE_4(sc, IWI_CSR_TX3_BASE, sc->txq[2].desc_map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2763
CSR_WRITE_4(sc, IWI_CSR_TX3_SIZE, sc->txq[2].count);
sys/dev/pci/if_iwi.c
2764
CSR_WRITE_4(sc, IWI_CSR_TX3_WIDX, sc->txq[2].cur);
sys/dev/pci/if_iwi.c
2766
CSR_WRITE_4(sc, IWI_CSR_TX4_BASE, sc->txq[3].desc_map->dm_segs[0].ds_addr);
sys/dev/pci/if_iwi.c
2767
CSR_WRITE_4(sc, IWI_CSR_TX4_SIZE, sc->txq[3].count);
sys/dev/pci/if_iwi.c
2768
CSR_WRITE_4(sc, IWI_CSR_TX4_WIDX, sc->txq[3].cur);
sys/dev/pci/if_iwi.c
2771
CSR_WRITE_4(sc, IWI_CSR_RX_BASE + i * 4,
sys/dev/pci/if_iwi.c
2774
CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, sc->rxq.count -1);
sys/dev/pci/if_iwi.c
2925
CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_SW_RESET);
sys/dev/pci/if_iwireg.h
563
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
568
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
573
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_iwireg.h
574
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_iwireg.h
578
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sys/dev/pci/if_kse.c
1027
CSR_WRITE_4(sc, MDTSC, 1);
sys/dev/pci/if_kse.c
1068
CSR_WRITE_4(sc, MAAH0 + i*8, 0);
sys/dev/pci/if_kse.c
1107
CSR_WRITE_4(sc, MAAL0 + i*8, addr);
sys/dev/pci/if_kse.c
1109
CSR_WRITE_4(sc, MAAH0 + i*8, addr | (1U << 31));
sys/dev/pci/if_kse.c
1122
CSR_WRITE_4(sc, MTR0, mchash[0]);
sys/dev/pci/if_kse.c
1123
CSR_WRITE_4(sc, MTR1, mchash[1]);
sys/dev/pci/if_kse.c
1202
CSR_WRITE_4(sc, INTST, isr);
sys/dev/pci/if_kse.c
1487
CSR_WRITE_4(sc, MDTXC, sc->sc_txc);
sys/dev/pci/if_kse.c
1488
CSR_WRITE_4(sc, MDRXC, sc->sc_rxc);
sys/dev/pci/if_kse.c
764
CSR_WRITE_4(sc, TDLB, KSE_CDTXADDR(sc, 0));
sys/dev/pci/if_kse.c
765
CSR_WRITE_4(sc, RDLB, KSE_CDRXADDR(sc, 0));
sys/dev/pci/if_kse.c
813
CSR_WRITE_4(sc, MDTXC, sc->sc_txc);
sys/dev/pci/if_kse.c
814
CSR_WRITE_4(sc, MDRXC, sc->sc_rxc);
sys/dev/pci/if_kse.c
815
CSR_WRITE_4(sc, MDRSC, 1);
sys/dev/pci/if_kse.c
821
CSR_WRITE_4(sc, INTST, ~0);
sys/dev/pci/if_kse.c
822
CSR_WRITE_4(sc, INTEN, sc->sc_inten);
sys/dev/pci/if_kse.c
854
CSR_WRITE_4(sc, MDTXC, sc->sc_txc);
sys/dev/pci/if_kse.c
855
CSR_WRITE_4(sc, MDRXC, sc->sc_rxc);
sys/dev/pci/if_msk.c
1021
CSR_WRITE_4(sc, SK_I2CHWIRQ, 1);
sys/dev/pci/if_msk.c
1028
CSR_WRITE_4(sc, SK_DPT_TIMER_CTRL, SK_DPT_TCTL_STOP);
sys/dev/pci/if_msk.c
2314
CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sys/dev/pci/if_msk.c
2370
CSR_WRITE_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_IRQ_CLEAR);
sys/dev/pci/if_msk.c
2376
CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sys/dev/pci/if_msk.c
265
CSR_WRITE_4(sc, reg, x);
sys/dev/pci/if_msk.c
2681
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_msk.c
2738
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_msk.c
934
CSR_WRITE_4(sc, SK_Y2_CPU_WDOG, 0);
sys/dev/pci/if_msk.c
943
CSR_WRITE_4(sc, SK_Y2_CPU_WDOG, 0);
sys/dev/pci/if_sk.c
1979
CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sys/dev/pci/if_sk.c
2162
CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sys/dev/pci/if_sk.c
2334
CSR_WRITE_4(sc, SK_BMU_RX_CSR0,
sys/dev/pci/if_sk.c
2339
CSR_WRITE_4(sc, SK_BMU_RX_CSR1,
sys/dev/pci/if_sk.c
2346
CSR_WRITE_4(sc, SK_BMU_TXS_CSR0,
sys/dev/pci/if_sk.c
2351
CSR_WRITE_4(sc, SK_BMU_TXS_CSR1,
sys/dev/pci/if_sk.c
2384
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_sk.c
262
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_sk.c
273
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_sk.c
284
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_sk.c
2857
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_sk.c
2945
CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sys/dev/pci/if_sk.c
295
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_sk.c
296
CSR_WRITE_4(sc, SK_WIN_BASE + SK_REG(reg), x);
sys/dev/pci/if_sk.c
298
CSR_WRITE_4(sc, reg, x);
sys/dev/pci/if_sk.c
306
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_sk.c
317
CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
sys/dev/pci/if_stge.c
1474
CSR_WRITE_4(sc, STGE_AsicCtrl,
sys/dev/pci/if_stge.c
1563
CSR_WRITE_4(sc, STGE_RMONStatisticsMask, 0xffffffff);
sys/dev/pci/if_stge.c
1564
CSR_WRITE_4(sc, STGE_StatisticsMask,
sys/dev/pci/if_stge.c
1576
CSR_WRITE_4(sc, STGE_TFDListPtrHi,
sys/dev/pci/if_stge.c
1578
CSR_WRITE_4(sc, STGE_TFDListPtrLo,
sys/dev/pci/if_stge.c
1581
CSR_WRITE_4(sc, STGE_RFDListPtrHi,
sys/dev/pci/if_stge.c
1583
CSR_WRITE_4(sc, STGE_RFDListPtrLo,
sys/dev/pci/if_stge.c
1617
CSR_WRITE_4(sc, STGE_RxDMAIntCtrl,
sys/dev/pci/if_stge.c
1632
CSR_WRITE_4(sc, STGE_DMACtrl, sc->sc_DMACtrl |
sys/dev/pci/if_stge.c
1659
CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sys/dev/pci/if_stge.c
1750
CSR_WRITE_4(sc, STGE_MACCtrl,
sys/dev/pci/if_stge.c
1757
CSR_WRITE_4(sc, STGE_TFDListPtrHi, 0);
sys/dev/pci/if_stge.c
1758
CSR_WRITE_4(sc, STGE_TFDListPtrLo, 0);
sys/dev/pci/if_stge.c
1759
CSR_WRITE_4(sc, STGE_RFDListPtrHi, 0);
sys/dev/pci/if_stge.c
1760
CSR_WRITE_4(sc, STGE_RFDListPtrLo, 0);
sys/dev/pci/if_stge.c
1950
CSR_WRITE_4(sc, STGE_HashTable0, mchash[0]);
sys/dev/pci/if_stge.c
1951
CSR_WRITE_4(sc, STGE_HashTable1, mchash[1]);
sys/dev/pci/if_stge.c
2002
CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sys/dev/pci/if_stge.c
984
CSR_WRITE_4(sc, STGE_DMACtrl,
sys/dev/pci/if_ti.c
1042
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0);
sys/dev/pci/if_ti.c
1084
CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sys/dev/pci/if_ti.c
1085
CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/pci/if_ti.c
1112
CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sys/dev/pci/if_ti.c
1113
CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sys/dev/pci/if_ti.c
1156
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/pci/if_ti.c
1197
CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
sys/dev/pci/if_ti.c
1213
CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
sys/dev/pci/if_ti.c
1226
CSR_WRITE_4(sc, 0x600, 0);
sys/dev/pci/if_ti.c
1227
CSR_WRITE_4(sc, 0x604, 0);
sys/dev/pci/if_ti.c
1228
CSR_WRITE_4(sc, 0x600, 0x5555AAAA);
sys/dev/pci/if_ti.c
1259
CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
sys/dev/pci/if_ti.c
1262
CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
sys/dev/pci/if_ti.c
1299
CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD | TI_PCI_WRITE_CMD);
sys/dev/pci/if_ti.c
1333
CSR_WRITE_4(sc, PCI_COMMAND_STATUS_REG,
sys/dev/pci/if_ti.c
1358
CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD |
sys/dev/pci/if_ti.c
1363
CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA |
sys/dev/pci/if_ti.c
1382
CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
sys/dev/pci/if_ti.c
1383
CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
sys/dev/pci/if_ti.c
1408
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/pci/if_ti.c
1411
CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0);
sys/dev/pci/if_ti.c
1412
CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, TI_CDGIBADDR(sc));
sys/dev/pci/if_ti.c
1428
CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0);
sys/dev/pci/if_ti.c
1438
CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0);
sys/dev/pci/if_ti.c
1440
CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0);
sys/dev/pci/if_ti.c
1441
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0);
sys/dev/pci/if_ti.c
1514
CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE);
sys/dev/pci/if_ti.c
1556
CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS,
sys/dev/pci/if_ti.c
1559
CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks);
sys/dev/pci/if_ti.c
1560
CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks);
sys/dev/pci/if_ti.c
1561
CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
sys/dev/pci/if_ti.c
1562
CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds);
sys/dev/pci/if_ti.c
1563
CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds);
sys/dev/pci/if_ti.c
1564
CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio);
sys/dev/pci/if_ti.c
1567
CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0);
sys/dev/pci/if_ti.c
1568
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/pci/if_ti.c
2035
CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX,
sys/dev/pci/if_ti.c
2061
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2064
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2067
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2070
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2163
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/pci/if_ti.c
2176
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/pci/if_ti.c
2252
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2255
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2258
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2261
CSR_WRITE_4(sc, TI_WINBASE,
sys/dev/pci/if_ti.c
2442
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx);
sys/dev/pci/if_ti.c
2481
CSR_WRITE_4(sc, TI_GCR_IFINDEX, device_unit(sc->sc_dev)); /* ??? */
sys/dev/pci/if_ti.c
2486
CSR_WRITE_4(sc, TI_GCR_IFMTU, tmp);
sys/dev/pci/if_ti.c
2492
CSR_WRITE_4(sc, TI_GCR_PAR0, (m[0] << 8) | m[1]);
sys/dev/pci/if_ti.c
2493
CSR_WRITE_4(sc, TI_GCR_PAR1, (m[2] << 24) | (m[3] << 16)
sys/dev/pci/if_ti.c
2529
CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0);
sys/dev/pci/if_ti.c
2539
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sys/dev/pci/if_ti.c
2575
CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF | TI_GLNK_1000MB |
sys/dev/pci/if_ti.c
2578
CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB | TI_LNK_10MB |
sys/dev/pci/if_ti.c
2587
CSR_WRITE_4(sc, TI_GCR_GLINK,
sys/dev/pci/if_ti.c
2591
CSR_WRITE_4(sc, TI_GCR_GLINK,
sys/dev/pci/if_ti.c
2595
CSR_WRITE_4(sc, TI_GCR_LINK, 0);
sys/dev/pci/if_ti.c
2603
CSR_WRITE_4(sc, TI_GCR_GLINK, 0);
sys/dev/pci/if_ti.c
2604
CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB | TI_LNK_PREF);
sys/dev/pci/if_ti.c
2813
CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sys/dev/pci/if_ti.c
363
CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sys/dev/pci/if_ti.c
413
CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr);
sys/dev/pci/if_ti.c
432
CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr);
sys/dev/pci/if_ti.c
452
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(uint32_t *)(cmd));
sys/dev/pci/if_ti.c
454
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sys/dev/pci/if_ti.c
470
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(uint32_t *)(cmd));
sys/dev/pci/if_ti.c
473
CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4),
sys/dev/pci/if_ti.c
477
CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sys/dev/pci/if_ti.c
532
CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
sys/dev/pci/if_tireg.h
907
CSR_WRITE_4(x, TI_MB_JUMBORXPROD_IDX, y); \
sys/dev/pci/if_tireg.h
911
CSR_WRITE_4(x, TI_MB_MINIRXPROD_IDX, y)
sys/dev/pci/if_tireg.h
917
CSR_WRITE_4(x, TI_MB_STDRXPROD_IDX, y); \
sys/dev/pci/if_tireg.h
977
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | (x)))
sys/dev/pci/if_tireg.h
979
CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~(x)))
sys/dev/pci/if_vge.c
1476
CSR_WRITE_4(sc, VGE_ISR, status);
sys/dev/pci/if_vge.c
1804
CSR_WRITE_4(sc, VGE_TXDESC_HIADDR, VGE_ADDR_HI(VGE_CDTXADDR(sc, 0)));
sys/dev/pci/if_vge.c
1805
CSR_WRITE_4(sc, VGE_TXDESC_ADDR_LO0, VGE_ADDR_LO(VGE_CDTXADDR(sc, 0)));
sys/dev/pci/if_vge.c
1808
CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO, VGE_ADDR_LO(VGE_CDRXADDR(sc, 0)));
sys/dev/pci/if_vge.c
1896
CSR_WRITE_4(sc, VGE_IMR, 0);
sys/dev/pci/if_vge.c
1904
CSR_WRITE_4(sc, VGE_IMR, VGE_INTRS);
sys/dev/pci/if_vge.c
1905
CSR_WRITE_4(sc, VGE_ISR, 0);
sys/dev/pci/if_vge.c
2064
CSR_WRITE_4(sc, VGE_ISR, 0xFFFFFFFF);
sys/dev/pci/if_vge.c
2067
CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO, 0);
sys/dev/pci/if_vge.c
279
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (x))
sys/dev/pci/if_vge.c
286
CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(x))
sys/dev/pci/if_vge.c
650
CSR_WRITE_4(sc, VGE_MAR0, 0);
sys/dev/pci/if_vge.c
651
CSR_WRITE_4(sc, VGE_MAR1, 0);
sys/dev/pci/if_vge.c
660
CSR_WRITE_4(sc, VGE_MAR0, 0xFFFFFFFF);
sys/dev/pci/if_vge.c
661
CSR_WRITE_4(sc, VGE_MAR1, 0xFFFFFFFF);
sys/dev/pci/if_vge.c
711
CSR_WRITE_4(sc, VGE_MAR0, hashes[0]);
sys/dev/pci/if_vge.c
712
CSR_WRITE_4(sc, VGE_MAR1, hashes[1]);
sys/dev/pci/if_vr.c
1257
CSR_WRITE_4(sc, VR_RXADDR, VR_CDRXADDR(sc, sc->vr_rxptr));
sys/dev/pci/if_vr.c
1258
CSR_WRITE_4(sc, VR_TXADDR, VR_CDTXADDR(sc, VR_NEXTTX(sc->vr_txlast)));
sys/dev/pci/if_vr.c
1403
CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
sys/dev/pci/if_vr.c
1404
CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
sys/dev/pci/if_vr.c
345
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_vr.c
349
CSR_WRITE_4(sc, reg, \
sys/dev/pci/if_vr.c
478
CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
sys/dev/pci/if_vr.c
479
CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
sys/dev/pci/if_vr.c
484
CSR_WRITE_4(sc, VR_MAR0, 0);
sys/dev/pci/if_vr.c
485
CSR_WRITE_4(sc, VR_MAR1, 0);
sys/dev/pci/if_vr.c
515
CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
sys/dev/pci/if_vr.c
516
CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
sys/dev/pci/if_vr.c
823
CSR_WRITE_4(sc, VR_RXADDR, VR_CDRXADDR(sc, sc->vr_rxptr));
sys/dev/pci/if_vr.c
869
CSR_WRITE_4(sc, VR_TXADDR, VR_CDTXADDR(sc, i));