sys/arch/evbmips/cavium/machdep.c

389

const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE);

sys/arch/mips/cavium/dev/octeon_fau.c

55

return octeon_xkphys_read_8(addr);

sys/arch/mips/cavium/dev/octeon_fpavar.h

100

return octeon_xkphys_read_8(addr);

sys/arch/mips/cavium/dev/octeon_powvar.h

105

return octeon_xkphys_read_8(ptr);

sys/arch/mips/cavium/dev/octeon_rnm.c

341

return octeon_xkphys_read_8(addr);

sys/arch/mips/cavium/octeon_cpunode.c

118

const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE);

sys/arch/mips/cavium/octeon_misc.c

200

if (octeon_xkphys_read_8(MIO_FUS_PDF) & MIO_FUS_PDF_IS_71XX)

sys/arch/mips/cavium/octeon_misc.c

240

mio_rst_boot = octeon_xkphys_read_8(MIO_RST_BOOT);

sys/arch/mips/cavium/octeon_misc.c

244

rst_boot = octeon_xkphys_read_8(RST_BOOT);

sys/arch/mips/cavium/octeon_misc.c

92

const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE);

sys/arch/mips/cavium/octeonvar.h

302

return octeon_xkphys_read_8(OCTEON_CVMSEG_LM + offset);