mii_writereg
mii->mii_writereg = emac_mii_writereg;
mii->mii_writereg = epe_mii_writereg;
(*sc->sc_mii.mii_writereg)(sc->sc_dev, sc->sc_phy, 0x0018, 0x0041);
mii->mii_writereg = gma->gma_mii_writereg;
mii->mii_writereg = enet_miibus_writereg;
(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val);
(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val | BMCR_LOOP);
(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val);
(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val | BMCR_RESET);
static int mii_writereg(device_t, int, int, uint16_t);
mii->mii_writereg = mii_writereg;
mii->mii_writereg = sun4i_emac_miibus_write_reg;
mii->mii_writereg = sunxi_emac_mii_writereg;
mii->mii_writereg = cpsw_mii_writereg;
mii->mii_writereg = npe_miibus_writereg;
mii->mii_writereg = temac_mii_writereg;
mii->mii_writereg = bmac_mii_writereg;
mii->mii_writereg = gmac_mii_writereg;
mii->mii_writereg = aumac_mii_writereg;
mii->mii_writereg = ae_mii_writereg;
mii->mii_writereg = cnmac_mii_writereg;
mii->mii_writereg = ralink_eth_mii_write;
mii->mii_writereg = sbmac_mii_writereg;
mii->mii_writereg = NULL;
mii->mii_writereg = emac3_phy_writereg;
mii->mii_writereg = pq3mdio_mii_writereg;
mii->mii_writereg = emac_mii_writereg;
mii->mii_writereg = fec_miibus_writereg;
mii->mii_writereg = mec_mii_writereg;
mii->mii_writereg = cemac_mii_writereg;
mii->mii_writereg = sf_mii_write;
mii->mii_writereg = ax88190_mii_writereg;
mii->mii_writereg = genet_mii_writereg;
mii->mii_writereg = dl10019_mii_writereg;
static int mii_writereg(device_t, int, int, uint16_t);
mii->mii_writereg = mii_writereg;
mii_writereg(sc->sc_dev, 1, MII_BMCR, BMCR_RESET);
mii->mii_writereg = eqos_mii_writereg;
mii->mii_writereg = dwc_gmac_miibus_write_reg;
mii->mii_writereg = ep_mii_writereg;
mii->mii_writereg = ex_mii_writereg;
mii->mii_writereg = gem_mii_writereg;
mii->mii_writereg = hme_mii_writereg;
mii->mii_writereg = fxp_mdi_write;
mii->mii_writereg = lan9118_miibus_writereg;
mii->mii_writereg = mtd_mii_writereg;
mii->mii_writereg = re_miibus_writereg;
mii->mii_writereg = rtk_phy_writereg;
mii->mii_writereg = epic_mii_write;
mii->mii_writereg = smc91cxx_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_pnic_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_al981_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = tlp_bitbang_mii_writereg;
mii->mii_writereg = gfec_mii_write;
mii->mii_writereg = mvgbec_miibus_writereg;
mii->mii_writereg = mvxpe_miibus_writereg;
(*(p)->mii_pdata->mii_writereg)(device_parent((p)->mii_dev), \
mii_writereg_t mii_writereg;
(*(p)->mii_pdata->mii_writereg)(device_parent((p)->mii_dev), \
mii->mii_writereg = age_miibus_writereg;
mii->mii_writereg = alc_miibus_writereg;
mii->mii_writereg = ale_miibus_writereg;
mii->mii_writereg = bce_mii_write;
mii->mii_writereg = bge_miibus_writereg;
mii->mii_writereg = bnx_miibus_write_reg;
mii->mii_writereg = cas_mii_writereg;
mii->mii_writereg = cas_pcs_writereg;
mii->mii_writereg = et_miibus_writereg;
mii->mii_writereg = jme_mii_write;
mii->mii_writereg = kse_mii_writereg;
mii->mii_writereg = lii_mii_writereg;
mii->mii_writereg = msk_miibus_writereg;
mii->mii_writereg = nfe_miibus_writereg;
mii->mii_writereg = pcn_mii_writereg;
mii->mii_writereg = sip->sip_variant->sipv_mii_writereg;
mii->mii_writereg = sk_xmac_miibus_writereg;
mii->mii_writereg = sk_marv_miibus_writereg;
mii->mii_writereg = ste_mii_writereg;
mii->mii_writereg = stge_mii_writereg;
mii->mii_writereg = tl_mii_write;
mii->mii_writereg = vge_miibus_writereg;
mii->mii_writereg = vr_mii_writereg;
mii->mii_writereg = vte_miibus_writereg;
mii->mii_writereg = new_writereg;
mii->mii_writereg = wm_gmii_bm_writereg;
sc->sc_mii.mii_writereg(sc->sc_dev, 1, IGP3_VR_CTRL, phyreg);
mii->mii_writereg(sc->sc_dev, 1, IGPHY_POWER_MGMT, phyval);
rv = mii->mii_writereg(dev, 2, BM_RATE_ADAPTATION_CTRL,
rv = mii->mii_writereg(dev, 2, HV_KMRN_FIFO_CTRLSTA, 0xa204);
rv = mii->mii_writereg(dev, 2, MII_BMCR, 0x3140);
mii->mii_writereg = xi_mdi_write;
mii->mii_writereg = be_mii_writereg;
mii->mii_writereg = usbnet_mii_writereg;