Symbol: mfspr
sys/arch/evbppc/mpc85xx/machdep.c
1092
hid0 = mfspr(SPR_HID0);
sys/arch/evbppc/mpc85xx/machdep.c
1170
const register_t hid0 = mfspr(SPR_HID0);
sys/arch/evbppc/mpc85xx/machdep.c
1271
printf(" hid0=%#lx/%#jx", hid0, (uintmax_t)mfspr(SPR_HID0));
sys/arch/evbppc/mpc85xx/machdep.c
1272
printf(" hid1=%#jx", (uintmax_t)mfspr(SPR_HID1));
sys/arch/evbppc/mpc85xx/machdep.c
1291
mtspr(SPR_TCR, TCR_WIE | mfspr(SPR_TCR));
sys/arch/evbppc/mpc85xx/machdep.c
1436
booke_cpu_startup(socname(mfspr(SPR_SVR)));
sys/arch/evbppc/mpc85xx/machdep.c
672
const uint32_t l1cfg0 = mfspr(SPR_L1CFG0);
sys/arch/evbppc/mpc85xx/machdep.c
679
const uint32_t l1cfg1 = mfspr(SPR_L1CFG1);
sys/arch/evbppc/mpc85xx/machdep.c
694
uint32_t l1csr0 = mfspr(SPR_L1CSR0);
sys/arch/evbppc/mpc85xx/machdep.c
698
uint32_t l1csr1 = mfspr(SPR_L1CSR1);
sys/arch/evbppc/mpc85xx/machdep.c
707
uint16_t svr = mfspr(SPR_SVR) >> 16;
sys/arch/evbppc/mpc85xx/machdep.c
792
const uint32_t svr = mfspr(SPR_SVR);
sys/arch/evbppc/mpc85xx/machdep.c
793
const uint32_t pir = mfspr(SPR_PIR);
sys/arch/evbppc/mpc85xx/machdep.c
803
const uint32_t l1cfg0 = mfspr(SPR_L1CFG0);
sys/arch/evbppc/mpc85xx/machdep.c
813
const uint32_t l1cfg1 = mfspr(SPR_L1CFG1);
sys/arch/evbppc/mpc85xx/machdep.c
822
const uint32_t mmucfg = mfspr(SPR_MMUCFG);
sys/arch/evbppc/mpc85xx/machdep.c
830
e500_tlb_print(self, "tlb0", mfspr(SPR_TLB0CFG));
sys/arch/evbppc/mpc85xx/machdep.c
831
e500_tlb_print(self, "tlb1", mfspr(SPR_TLB1CFG));
sys/arch/evbppc/mpc85xx/machdep.c
880
h->hatch_hid0 = mfspr(SPR_HID0);
sys/arch/evbppc/mpc85xx/machdep.c
895
tbu = mfspr(SPR_RTBU);
sys/arch/evbppc/mpc85xx/machdep.c
896
tbl = mfspr(SPR_RTBL) + TBSYNC_SLOP;
sys/arch/evbppc/nintendo/cpu.c
144
mtspr(SPR_SCR, mfspr(SPR_SCR) | SPR_SCR_WAKE(cpu_num));
sys/arch/evbppc/nintendo/dev/wiifb.c
355
value = mfspr(IBM750CL_SPR_HID2);
sys/arch/evbppc/nintendo/dev/wiifb.c
369
value = mfspr(SPR_HID0);
sys/arch/evbppc/nintendo/dev/wiifb.c
620
register_t hid0 = mfspr(SPR_HID0);
sys/arch/evbppc/nintendo/ipi_latte.c
75
mtspr(SPR_SCR, mfspr(SPR_SCR) | scr_mask);
sys/arch/evbppc/nintendo/machdep.c
409
spr = mfspr(IBM750CL_SPR_HID4);
sys/arch/evbppc/nintendo/machdep.c
417
spr = mfspr(SPR_IBMESPRESSO_HID5);
sys/arch/evbppc/nintendo/machdep.c
420
spr = mfspr(SPR_SCR);
sys/arch/evbppc/nintendo/machdep.c
423
spr = mfspr(SPR_CAR);
sys/arch/evbppc/nintendo/pic_pi.c
110
spr = mfspr(SPR_SCR);
sys/arch/evbppc/nintendo/pic_pi.c
124
register_t spr = mfspr(SPR_SCR);
sys/arch/powerpc/booke/dev/e500wdog.c
123
uint32_t tcr = mfspr(SPR_TCR);
sys/arch/powerpc/booke/dev/e500wdog.c
150
const uint32_t tcr = mfspr(SPR_TCR);
sys/arch/powerpc/booke/dev/pq3etsec.c
350
const uint16_t svr = (mfspr(SPR_SVR) & ~0x80000) >> 16;
sys/arch/powerpc/booke/e500_autoconf.c
81
uint32_t svr = (mfspr(SPR_SVR) >> 16) & ~8;
sys/arch/powerpc/booke/e500_intr.c
1103
const uint16_t svr = (mfspr(SPR_SVR) & ~0x80000) >> 16;
sys/arch/powerpc/booke/e500_intr.c
1157
__func__, (uintmax_t)mfspr(SPR_SVR));
sys/arch/powerpc/booke/e500_intr.c
1404
uint32_t tcr = mfspr(SPR_TCR);
sys/arch/powerpc/booke/e500_tlb.c
163
const register_t saved_mas0 = mfspr(SPR_MAS0);
sys/arch/powerpc/booke/e500_tlb.c
174
hwtlb.hwtlb_mas0 = mfspr(SPR_MAS0);
sys/arch/powerpc/booke/e500_tlb.c
175
hwtlb.hwtlb_mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
176
hwtlb.hwtlb_mas2 = mfspr(SPR_MAS2);
sys/arch/powerpc/booke/e500_tlb.c
177
hwtlb.hwtlb_mas3 = mfspr(SPR_MAS3);
sys/arch/powerpc/booke/e500_tlb.c
189
const uint32_t saved_mas0 = mfspr(SPR_MAS0);
sys/arch/powerpc/booke/e500_tlb.c
349
return mfspr(SPR_PID0);
sys/arch/powerpc/booke/e500_tlb.c
370
while (mfspr(SPR_MMUCSR0) != 0)
sys/arch/powerpc/booke/e500_tlb.c
395
uint32_t mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
414
mfspr(SPR_MAS2) & MAS2_EPN;
sys/arch/powerpc/booke/e500_tlb.c
447
const uint32_t mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
485
const uint32_t mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
550
register_t mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
596
const uint32_t saved_mas0 = mfspr(SPR_MAS0);
sys/arch/powerpc/booke/e500_tlb.c
610
hwtlb.hwtlb_mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
617
hwtlb.hwtlb_mas2 = mfspr(SPR_MAS2);
sys/arch/powerpc/booke/e500_tlb.c
618
hwtlb.hwtlb_mas3 = mfspr(SPR_MAS3);
sys/arch/powerpc/booke/e500_tlb.c
654
const uint32_t saved_mas0 = mfspr(SPR_MAS0);
sys/arch/powerpc/booke/e500_tlb.c
664
hwtlb.hwtlb_mas1 = mfspr(SPR_MAS1);
sys/arch/powerpc/booke/e500_tlb.c
666
hwtlb.hwtlb_mas2 = mfspr(SPR_MAS2);
sys/arch/powerpc/booke/e500_tlb.c
667
hwtlb.hwtlb_mas3 = mfspr(SPR_MAS3);
sys/arch/powerpc/booke/e500_tlb.c
905
register_t mmucfg = mfspr(SPR_MMUCFG);
sys/arch/powerpc/booke/e500_tlb.c
906
register_t mas4 = mfspr(SPR_MAS4);
sys/arch/powerpc/booke/trap.c
765
(uintmax_t)mfspr(SPR_SPRG1));
sys/arch/powerpc/ibm4xx/dev/wdog.c
125
if (mfspr(SPR_TSR) & TSR_WRS_MASK) {
sys/arch/powerpc/ibm4xx/dev/wdog.c
157
tsr = mfspr(SPR_TSR);
sys/arch/powerpc/ibm4xx/dev/wdog.c
196
uint32_t tsr = mfspr(SPR_TSR);
sys/arch/powerpc/ibm4xx/dev/wdog.c
223
uint32_t tcr = mfspr(SPR_TCR);
sys/arch/powerpc/ibm4xx/dev/wdog.c
229
uint32_t tcr = mfspr(SPR_TCR);
sys/arch/powerpc/ibm4xx/ibm4xx_machdep.c
321
mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) & ~DBCR0_TDE);
sys/arch/powerpc/ibm4xx/pmap.c
1256
KASSERT(mfspr(SPR_PID) == KERNEL_PID);
sys/arch/powerpc/ibm4xx/pmap.c
1622
KASSERT(mfspr(SPR_PID) == KERNEL_PID);
sys/arch/powerpc/ibm4xx/trap.c
422
const uint32_t mcsr = mfspr(SPR_MCSR);
sys/arch/powerpc/ibm4xx/trap.c
426
(u_long)mfspr(SPR_MCSRR0),
sys/arch/powerpc/ibm4xx/trap.c
427
(u_long)mfspr(SPR_MCSRR1));
sys/arch/powerpc/include/oea/spr.h
341
ret = mfspr(SPR_SCOMD);
sys/arch/powerpc/oea/cpu_subr.c
1067
x = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1072
x = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1109
x = mfspr(SPR_L3CR);
sys/arch/powerpc/oea/cpu_subr.c
1135
l2cr = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1151
l2cr = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1201
l2cr = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1217
l2cr = mfspr(SPR_L2CR);
sys/arch/powerpc/oea/cpu_subr.c
1234
l3cr = mfspr(SPR_L3CR);
sys/arch/powerpc/oea/cpu_subr.c
1250
l3cr = mfspr(SPR_L3CR);
sys/arch/powerpc/oea/cpu_subr.c
1268
cps = (mfspr(SPR_PMC1) * 10) + 4999;
sys/arch/powerpc/oea/cpu_subr.c
1289
if (mfspr(SPR_HID1) & HID1_DFS4)
sys/arch/powerpc/oea/cpu_subr.c
1293
if (mfspr(SPR_HID1) & HID1_DFS2)
sys/arch/powerpc/oea/cpu_subr.c
1342
hid1 = old_hid1 = mfspr(SPR_HID1);
sys/arch/powerpc/oea/cpu_subr.c
1434
((mfspr(SPR_THRM1) & SPR_THRM_TIV) == 0)) {
sys/arch/powerpc/oea/cpu_subr.c
1438
if (mfspr(SPR_THRM1) & SPR_THRM_TIN) {
sys/arch/powerpc/oea/cpu_subr.c
1497
h->hatch_hid0 = mfspr(SPR_HID0);
sys/arch/powerpc/oea/cpu_subr.c
1499
h->hatch_hid1 = mfspr(SPR_HID1);
sys/arch/powerpc/oea/cpu_subr.c
1500
h->hatch_hid4 = mfspr(SPR_HID4);
sys/arch/powerpc/oea/cpu_subr.c
1501
h->hatch_hid5 = mfspr(SPR_HID5);
sys/arch/powerpc/oea/cpu_subr.c
1510
h->hatch_asr = mfspr(SPR_ASR);
sys/arch/powerpc/oea/cpu_subr.c
1598
msr = mfspr(SPR_PIR);
sys/arch/powerpc/oea/cpu_subr.c
358
register_t hid0 = mfspr(SPR_HID0);
sys/arch/powerpc/oea/cpu_subr.c
359
register_t hid1 = mfspr(SPR_HID1);
sys/arch/powerpc/oea/cpu_subr.c
384
spr = mfspr(SPR_IBMESPRESSO_HID4);
sys/arch/powerpc/oea/cpu_subr.c
387
spr = mfspr(SPR_HID0);
sys/arch/powerpc/oea/cpu_subr.c
630
hid64_0_save = hid64_0 = mfspr(SPR_HID0);
sys/arch/powerpc/oea/cpu_subr.c
633
hid0_save = hid0 = mfspr(SPR_HID0);
sys/arch/powerpc/oea/cpu_subr.c
833
spr = mfspr(SPR_IBMESPRESSO_HID5);
sys/arch/powerpc/oea/cpu_subr.c
836
spr = mfspr(SPR_IBMESPRESSO_HID4);
sys/arch/powerpc/oea/cpu_subr.c
840
spr = mfspr(SPR_IBMESPRESSO_HID5);
sys/arch/powerpc/oea/oea_machdep.c
162
KASSERT(mfspr(SPR_SPRG0) == (uintptr_t)ci);
sys/arch/powerpc/oea/oea_machdep.c
523
#define DBATU_GET(n) mfspr(SPR_DBAT##n##U)
sys/arch/powerpc/powerpc/db_interface.c
413
ibat[0].batu = mfspr(SPR_IBAT0U);
sys/arch/powerpc/powerpc/db_interface.c
414
ibat[0].batl = mfspr(SPR_IBAT0L);
sys/arch/powerpc/powerpc/db_interface.c
415
ibat[1].batu = mfspr(SPR_IBAT1U);
sys/arch/powerpc/powerpc/db_interface.c
416
ibat[1].batl = mfspr(SPR_IBAT1L);
sys/arch/powerpc/powerpc/db_interface.c
417
ibat[2].batu = mfspr(SPR_IBAT2U);
sys/arch/powerpc/powerpc/db_interface.c
418
ibat[2].batl = mfspr(SPR_IBAT2L);
sys/arch/powerpc/powerpc/db_interface.c
419
ibat[3].batu = mfspr(SPR_IBAT3U);
sys/arch/powerpc/powerpc/db_interface.c
420
ibat[3].batl = mfspr(SPR_IBAT3L);
sys/arch/powerpc/powerpc/db_interface.c
422
ibat[4].batu = mfspr(SPR_IBAT4U);
sys/arch/powerpc/powerpc/db_interface.c
423
ibat[4].batl = mfspr(SPR_IBAT4L);
sys/arch/powerpc/powerpc/db_interface.c
424
ibat[5].batu = mfspr(SPR_IBAT5U);
sys/arch/powerpc/powerpc/db_interface.c
425
ibat[5].batl = mfspr(SPR_IBAT5L);
sys/arch/powerpc/powerpc/db_interface.c
426
ibat[6].batu = mfspr(SPR_IBAT6U);
sys/arch/powerpc/powerpc/db_interface.c
427
ibat[6].batl = mfspr(SPR_IBAT6L);
sys/arch/powerpc/powerpc/db_interface.c
428
ibat[7].batu = mfspr(SPR_IBAT7U);
sys/arch/powerpc/powerpc/db_interface.c
429
ibat[7].batl = mfspr(SPR_IBAT7L);
sys/arch/powerpc/powerpc/db_interface.c
434
dbat[0].batu = mfspr(SPR_DBAT0U);
sys/arch/powerpc/powerpc/db_interface.c
435
dbat[0].batl = mfspr(SPR_DBAT0L);
sys/arch/powerpc/powerpc/db_interface.c
436
dbat[1].batu = mfspr(SPR_DBAT1U);
sys/arch/powerpc/powerpc/db_interface.c
437
dbat[1].batl = mfspr(SPR_DBAT1L);
sys/arch/powerpc/powerpc/db_interface.c
438
dbat[2].batu = mfspr(SPR_DBAT2U);
sys/arch/powerpc/powerpc/db_interface.c
439
dbat[2].batl = mfspr(SPR_DBAT2L);
sys/arch/powerpc/powerpc/db_interface.c
440
dbat[3].batu = mfspr(SPR_DBAT3U);
sys/arch/powerpc/powerpc/db_interface.c
441
dbat[3].batl = mfspr(SPR_DBAT3L);
sys/arch/powerpc/powerpc/db_interface.c
443
dbat[4].batu = mfspr(SPR_DBAT4U);
sys/arch/powerpc/powerpc/db_interface.c
444
dbat[4].batl = mfspr(SPR_DBAT4L);
sys/arch/powerpc/powerpc/db_interface.c
445
dbat[5].batu = mfspr(SPR_DBAT5U);
sys/arch/powerpc/powerpc/db_interface.c
446
dbat[5].batl = mfspr(SPR_DBAT5L);
sys/arch/powerpc/powerpc/db_interface.c
447
dbat[6].batu = mfspr(SPR_DBAT6U);
sys/arch/powerpc/powerpc/db_interface.c
448
dbat[6].batl = mfspr(SPR_DBAT6L);
sys/arch/powerpc/powerpc/db_interface.c
449
dbat[7].batu = mfspr(SPR_DBAT7U);
sys/arch/powerpc/powerpc/db_interface.c
450
dbat[7].batl = mfspr(SPR_DBAT7L);
sys/arch/powerpc/powerpc/db_interface.c
646
zpr = mfspr(SPR_ZPR);