Symbol: intc_intr_establish
sys/arch/dreamcast/dreamcast/sysasic.c
139
syh->syh_intc = intc_intr_establish(idx2evt[idx], IST_LEVEL,
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4.c
69
(void) intc_intr_establish(SH4_INTEVT_GPIO, IST_LEVEL, IPL_TTY,
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_intr.c
122
eih->eih_func = intc_intr_establish(evtcode, trigger, level,
sys/arch/evbsh3/t_sh7706lan/if_ne_mainbus.c
184
msc->sc_ih = intc_intr_establish(SH7709_INTEVT2_IRQ2, IST_LEVEL,
sys/arch/hpcsh/dev/j6x0pwr.c
185
sc->sc_ih = intc_intr_establish(SH7709_INTEVT2_IRQ0, IST_EDGE, IPL_TTY,
sys/arch/hpcsh/dev/j6x0pwr.c
265
sc->sc_ih = intc_intr_establish(SH7709_INTEVT2_IRQ0, IST_EDGE, IPL_HIGH,
sys/arch/hpcsh/dev/j6x0pwr.c
281
sc->sc_ih = intc_intr_establish(SH7709_INTEVT2_IRQ0, IST_EDGE, IPL_TTY,
sys/arch/hpcsh/dev/j6x0tp.c
278
intc_intr_establish(SH7709_INTEVT2_IRQ3, IST_EDGE, IPL_TTY,
sys/arch/hpcsh/dev/psh3pwr.c
152
sc->sc_ih_pout = intc_intr_establish(SH7709_INTEVT2_IRQ0,
sys/arch/hpcsh/dev/psh3pwr.c
154
sc->sc_ih_pin = intc_intr_establish(SH7709_INTEVT2_IRQ1,
sys/arch/hpcsh/dev/psh3tp.c
197
intc_intr_establish(SH7709_INTEVT2_IRQ2,
sys/arch/hpcsh/hpcsh/autoconf.c
77
intc_intr_establish(SH7709_INTEVT2_IRQ4, IST_LEVEL, IPL_TTY,
sys/arch/hpcsh/hpcsh/autoconf.c
82
intc_intr_establish(SH_INTEVT_IRL11, IST_LEVEL, IPL_TTY,
sys/arch/landisk/landisk/intr.c
163
eih->eih_func = intc_intr_establish(evtcode, IST_LEVEL, level,
sys/arch/mmeye/mmeye/machdep.c
684
mh->intc_ih = intc_intr_establish(0x200 + (irq << 5), IST_LEVEL, level,
sys/arch/playstation2/dev/sbus.c
173
intc_intr_establish(I_CH1_SBUS, IPL_BIO, sbus_intr, 0);
sys/arch/playstation2/ee/intcvar.h
58
void *intc_intr_establish(enum intc_channel, int, int (*)(void *), void *);
sys/arch/playstation2/ee/timer.c
79
intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
sys/arch/playstation2/playstation2/interrupt.c
107
intc_intr_establish(I_CH10_TIMER1, IPL_SOFTCLOCK, timer1_intr, 0);
sys/arch/playstation2/playstation2/interrupt.c
108
intc_intr_establish(I_CH11_TIMER2, IPL_SOFTBIO, timer2_intr, 0);
sys/arch/playstation2/playstation2/interrupt.c
111
intc_intr_establish(I_CH12_TIMER3, IPL_SOFTNET, timer3_intr, 0);
sys/arch/riscv/fdt/intc_fdt.c
215
return intc_intr_establish(sc, source, ipl, mpsafe, func, arg, xname);
sys/arch/riscv/fdt/intc_fdt.c
351
intc_intr_establish(sc, IRQ_SUPERVISOR_TIMER, IPL_SCHED, IST_MPSAFE,
sys/arch/riscv/fdt/intc_fdt.c
355
intc_intr_establish(sc, IRQ_SUPERVISOR_SOFTWARE, IPL_HIGH, IST_MPSAFE,
sys/arch/sh3/dev/sci.c
408
intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
sys/arch/sh3/dev/sci.c
410
intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
sys/arch/sh3/dev/sci.c
412
intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
sys/arch/sh3/dev/sci.c
414
intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
sys/arch/sh3/dev/scif.c
478
intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
480
intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
482
intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
484
intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
487
intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
489
intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
491
intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/scif.c
493
intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
sys/arch/sh3/dev/shpcic.c
369
return intc_intr_establish(evtcode, IST_LEVEL, level, ih_func, ih_arg);
sys/arch/sh3/dev/wdog.c
126
intc_intr_establish(SH_INTEVT_WDT_ITI, IST_LEVEL, IPL_SOFTCLOCK,
sys/arch/sh3/include/intr.h
67
void *intc_intr_establish(int, int, int, int (*)(void *), void *);
sys/arch/sh3/sh3/clock.c
259
intc_intr_establish(SH_INTEVT_TMU0_TUNI0, IST_LEVEL, IPL_CLOCK,