common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

47

#define ATOMIC_OP_32_ARG(op,insn,arg) \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

51

insn %r5,%r3,arg ; \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

59

#define ATOMIC_OP_64_ARG(op,insn,arg) \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

63

insn %r5,%r3,arg ; \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

70

#define ATOMIC_OP_32_ARG_NV(op,insn,arg) \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

74

insn %r3,%r3,arg ; \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

82

#define ATOMIC_OP_64_ARG_NV(op,insn,arg) \

common/lib/libc/arch/powerpc/atomic/atomic_op_asm.h

86

insn %r3,%r3,arg ; \

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

409

uint32_t insn[3], *stubptr;

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

463

insn[insncnt++] = 0x08 << 26 | 27 << 21 | 27 << 16 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

476

insn[insncnt++] = 0x09 << 26 | 27 << 21 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

506

insn[insncnt++] = 0x09 << 26 | 27 << 21 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

512

insn[insncnt++] = 0x29 << 26 | 27 << 21 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

527

insn[insncnt++] = 0x30 << 26 | 31 << 21 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

531

insn[insncnt++] = 0x1a << 26 | 31 << 21 |

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

545

stubptr[insncnt] = insn[insncnt];

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

552

stubptr[0] = insn[0];

sys/arch/aarch64/aarch64/cpufunc.c

57

extract_cacheunit(int level, bool insn, int cachetype,

sys/arch/aarch64/aarch64/cpufunc.c

65

__SHIFTIN(insn ? 1 : 0, CSSELR_IND));

sys/arch/aarch64/aarch64/cpufunc.c

71

if (insn)

sys/arch/aarch64/aarch64/db_disasm.c

139

uint32_t insn = 0;

sys/arch/aarch64/aarch64/db_disasm.c

143

size = fetch_arm_insn(pc, spsr, &insn);

sys/arch/aarch64/aarch64/db_disasm.c

147

".insn 0x%0*x (%s)", size * 2, insn, arch);

sys/arch/aarch64/aarch64/db_interface.c

291

#define INSN_FMT_RN(insn) (((insn) >> 5) & 0x1f)

sys/arch/aarch64/aarch64/db_interface.c

292

#define INSN_FMT_IMM26(insn) ((insn) & 0x03ffffff)

sys/arch/aarch64/aarch64/db_interface.c

293

#define INSN_FMT_IMM19(insn) (((insn) >> 5) & 0x7ffff)

sys/arch/aarch64/aarch64/db_interface.c

294

#define INSN_FMT_IMM14(insn) (((insn) >> 5) & 0x3fff)

sys/arch/aarch64/aarch64/db_interface.c

333

#define INSN_FMT_COND(insn) ((insn) & 0xf)

sys/arch/aarch64/aarch64/db_trace.c

295

uint32_t insn;

sys/arch/aarch64/aarch64/db_trace.c

297

db_read_bytes(pc, sizeof(insn), (char *)&insn);

sys/arch/aarch64/aarch64/db_trace.c

298

if (insn == 0)

sys/arch/aarch64/aarch64/db_trace.c

300

LE32TOH(insn);

sys/arch/aarch64/aarch64/db_trace.c

302

TRACE_DEBUG("INSN: %016lx: %04x\n", pc, insn);

sys/arch/aarch64/aarch64/db_trace.c

306

insn == 0xd65f03e0 || /* "ret" */

sys/arch/aarch64/aarch64/db_trace.c

307

insn == 0xd69f03e0 || /* "eret" */

sys/arch/aarch64/aarch64/db_trace.c

308

insn == 0xd503233f)) /* "paciasp" */

sys/arch/aarch64/aarch64/db_trace.c

312

if ((insn & 0xff8003ff) == 0xd10003ff) {

sys/arch/aarch64/aarch64/db_trace.c

313

unsigned int sh = (insn >> 22) & 1;

sys/arch/aarch64/aarch64/db_trace.c

315

ZeroExtend(12, (insn >> 10) & 0xfff, 1);

sys/arch/aarch64/aarch64/db_trace.c

324

if ((insn & 0xffe0ffff) == 0xcb2063ff) {

sys/arch/aarch64/aarch64/db_trace.c

325

alloc_by_Xn_reg = (insn >> 16) & 0x1f;

sys/arch/aarch64/aarch64/db_trace.c

333

if ((insn & 0xff80001f) ==

sys/arch/aarch64/aarch64/db_trace.c

335

int hw = (insn >> 21) & 3;

sys/arch/aarch64/aarch64/db_trace.c

337

(insn >> 5) & 0xffff, 1) << (hw * 16);

sys/arch/aarch64/aarch64/db_trace.c

346

if ((insn & 0xff8003ff) ==

sys/arch/aarch64/aarch64/db_trace.c

348

uint64_t n = (insn >> 22) & 1;

sys/arch/aarch64/aarch64/db_trace.c

349

uint64_t immr = (insn >> 16) & 0x3f;

sys/arch/aarch64/aarch64/db_trace.c

350

uint64_t imms = (insn >> 10) & 0x3f;

sys/arch/aarch64/aarch64/db_trace.c

360

if ((insn & 0xffe0001f) ==

sys/arch/aarch64/aarch64/db_trace.c

363

ZeroExtend(16, (insn >> 5) & 0xffff, 1);

sys/arch/aarch64/aarch64/db_trace.c

373

if ((insn & 0xffe0001f) ==

sys/arch/aarch64/aarch64/db_trace.c

376

~ZeroExtend(16, (insn >> 5) & 0xffff, 1);

sys/arch/aarch64/aarch64/db_trace.c

388

if ((insn & 0xffe003e0) == 0xa9a003e0) {

sys/arch/aarch64/aarch64/db_trace.c

389

int64_t imm7 = SignExtend(7, (insn >> 15) & 0x7f, 8);

sys/arch/aarch64/aarch64/db_trace.c

390

uint64_t Rt2 = (insn >> 10) & 0x1f;

sys/arch/aarch64/aarch64/db_trace.c

391

uint64_t Rt1 = insn & 0x1f;

sys/arch/aarch64/aarch64/db_trace.c

418

if ((insn & 0xffc003e0) == 0xa90003e0) {

sys/arch/aarch64/aarch64/db_trace.c

419

int64_t imm7 = SignExtend(7, (insn >> 15) & 0x7f, 8);

sys/arch/aarch64/aarch64/db_trace.c

420

uint64_t Rt2 = (insn >> 10) & 0x1f;

sys/arch/aarch64/aarch64/db_trace.c

421

uint64_t Rt1 = insn & 0x1f;

sys/arch/aarch64/aarch64/db_trace.c

441

if ((insn & 0xffc003ff) == 0xf90003fe) {

sys/arch/aarch64/aarch64/db_trace.c

443

ZeroExtend(12, (insn >> 10) & 0xfff, 8);

sys/arch/aarch64/aarch64/db_trace.c

452

if ((insn & 0xfff00fff) == 0xf8100ffe) {

sys/arch/aarch64/aarch64/db_trace.c

453

int64_t imm9 = SignExtend(9, (insn >> 12) & 0x1ff, 1);

sys/arch/aarch64/aarch64/disasm.c

1005

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

1031

addsub_imm_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

1036

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

1057

csetsel_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

1084

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

1105

extendreg_common(di, pc, insn, sf, Rm, option, imm3, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1112

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

1133

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

1136

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1143

extendreg_common(di, pc, insn, sf, Rm, option, imm3, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1150

addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1157

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

1161

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1186

UNDEFINED(pc, insn, "illegal bitmasks");

sys/arch/aarch64/aarch64/disasm.c

1198

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1205

UNDEFINED(pc, insn, "illegal bitmasks");

sys/arch/aarch64/aarch64/disasm.c

1225

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1269

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

1447

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1453

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1532

csetsel_common(di, pc, insn, sf, Rm, cond, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1539

csetsel_common(di, pc, insn, sf, Rm, cond, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1569

extendreg_common(di, pc, insn, sf, Rm, option, imm3, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1576

addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1583

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

1588

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1610

crc32_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

1618

UNDEFINED(pc, insn, "illegal size");

sys/arch/aarch64/aarch64/disasm.c

1631

crc32_common(di, pc, insn, sf, Rm, sz, Rn, Rd, "crc32");

sys/arch/aarch64/aarch64/disasm.c

1636

crc32_common(di, pc, insn, sf, Rm, sz, Rn, Rd, "crc32c");

sys/arch/aarch64/aarch64/disasm.c

1651

UNDEFINED(pc, insn, "illegal level");

sys/arch/aarch64/aarch64/disasm.c

1678

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1685

UNDEFINED(pc, insn, "illegal bitmasks");

sys/arch/aarch64/aarch64/disasm.c

1697

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

1709

UNDEFINED(pc, insn, "illegal sf and N");

sys/arch/aarch64/aarch64/disasm.c

1963

regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,

sys/arch/aarch64/aarch64/disasm.c

1999

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrb");

sys/arch/aarch64/aarch64/disasm.c

2034

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "ldrh");

sys/arch/aarch64/aarch64/disasm.c

2069

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsb");

sys/arch/aarch64/aarch64/disasm.c

2104

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, opc ^ 1,

sys/arch/aarch64/aarch64/disasm.c

2147

regoffset_w_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsw");

sys/arch/aarch64/aarch64/disasm.c

2383

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

2444

UNDEFINED(pc, insn, "illegal bitmasks");

sys/arch/aarch64/aarch64/disasm.c

2473

UNDEFINED(pc, insn, "illegal size");

sys/arch/aarch64/aarch64/disasm.c

2499

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

2600

UNDEFINED(pc, insn, "illegal op1/op2");

sys/arch/aarch64/aarch64/disasm.c

2611

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

2618

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

2678

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

2743

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

2950

regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,

sys/arch/aarch64/aarch64/disasm.c

2986

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "strb");

sys/arch/aarch64/aarch64/disasm.c

3021

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, 0, "strh");

sys/arch/aarch64/aarch64/disasm.c

3142

extendreg_common(di, pc, insn, sf, Rm, option, imm3, Rn, Rd,

sys/arch/aarch64/aarch64/disasm.c

3149

UNDEFINED(pc, insn, "illegal shift");

sys/arch/aarch64/aarch64/disasm.c

3257

UNDEFINED(pc, insn, "illegal opc");

sys/arch/aarch64/aarch64/disasm.c

3309

UNDEFINED(pc, insn, "illegal opc");

sys/arch/aarch64/aarch64/disasm.c

3345

UNDEFINED(pc, insn, "illegal size/opc");

sys/arch/aarch64/aarch64/disasm.c

3362

UNDEFINED(pc, insn, "illegal size/opc");

sys/arch/aarch64/aarch64/disasm.c

3379

UNDEFINED(pc, insn, "illegal size/opc");

sys/arch/aarch64/aarch64/disasm.c

3403

UNDEFINED(pc, insn, "illegal size/opc");

sys/arch/aarch64/aarch64/disasm.c

3408

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

3483

UNDEFINED(pc, insn, "illegal sha operation");

sys/arch/aarch64/aarch64/disasm.c

3509

UNDEFINED(pc, insn, "illegal sha operation");

sys/arch/aarch64/aarch64/disasm.c

3555

UNDEFINED(pc, insn, "illegal sha512 operation");

sys/arch/aarch64/aarch64/disasm.c

3579

UNDEFINED(pc, insn, "illegal pmull size");

sys/arch/aarch64/aarch64/disasm.c

3604

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

3622

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

3640

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

3658

UNDEFINED(pc, insn, "undefined");

sys/arch/aarch64/aarch64/disasm.c

4064

disasm_insn(const disasm_interface_t *di, uintptr_t loc, uint32_t insn)

sys/arch/aarch64/aarch64/disasm.c

4070

if ((insn & insn_tables[i].mask) != insn_tables[i].pattern)

sys/arch/aarch64/aarch64/disasm.c

4077

args[j] = (insn >> insn_tables[i].bitinfo[j].pos) &

sys/arch/aarch64/aarch64/disasm.c

4080

insn_tables[i].opfunc(di, loc, insn,

sys/arch/aarch64/aarch64/disasm.c

4090

uint32_t insn;

sys/arch/aarch64/aarch64/disasm.c

4092

insn = le32toh(di->di_readword(loc));

sys/arch/aarch64/aarch64/disasm.c

4093

disasm_insn(di, loc, insn);

sys/arch/aarch64/aarch64/disasm.c

4096

return loc + sizeof(insn);

sys/arch/aarch64/aarch64/disasm.c

48

func(const disasm_interface_t *di, uint64_t pc, uint32_t insn, \

sys/arch/aarch64/aarch64/disasm.c

790

#define UNDEFINED(pc, insn, comment) \

sys/arch/aarch64/aarch64/disasm.c

791

PRINTF(".insn\t0x%08x\t# %s\n", insn, comment);

sys/arch/aarch64/aarch64/disasm.c

793

#define UNDEFINED(pc, insn, comment) \

sys/arch/aarch64/aarch64/disasm.c

794

PRINTF(".insn\t0x%08x\n", insn);

sys/arch/aarch64/aarch64/disasm.c

798

extendreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

841

shiftreg_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

847

UNDEFINED(pc, insn, "illegal imm6");

sys/arch/aarch64/aarch64/disasm.c

889

regoffset_b_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

896

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

921

regoffset_h_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

928

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

959

regoffset_w_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/disasm.c

966

UNDEFINED(pc, insn, "illegal option");

sys/arch/aarch64/aarch64/disasm.c

997

regoffset_x_common(const disasm_interface_t *di, uint64_t pc, uint32_t insn,

sys/arch/aarch64/aarch64/kobj_machdep.c

130

uint32_t *insn, immhi, immlo, shift;

sys/arch/aarch64/aarch64/kobj_machdep.c

162

insn = (uint32_t *)where;

sys/arch/aarch64/aarch64/kobj_machdep.c

193

le32toh(*insn), strdisasm((vaddr_t)insn, 0));

sys/arch/aarch64/aarch64/kobj_machdep.c

256

*insn = htole32(

sys/arch/aarch64/aarch64/kobj_machdep.c

257

(le32toh(*insn) & ~__BITS(21,10)) | (val << 10));

sys/arch/aarch64/aarch64/kobj_machdep.c

278

*insn = htole32((le32toh(*insn) &

sys/arch/aarch64/aarch64/kobj_machdep.c

302

*insn = htole32((le32toh(*insn) & ~__BITS(25,0)) | val);

sys/arch/aarch64/aarch64/kobj_machdep.c

359

le32toh(*insn), strdisasm((vaddr_t)insn, 0));

sys/arch/aarch64/aarch64/trap.c

382

uint32_t insn;

sys/arch/aarch64/aarch64/trap.c

384

if (ufetch_32((uint32_t *)tf->tf_pc, &insn)) {

sys/arch/aarch64/aarch64/trap.c

389

LE32TOH(insn);

sys/arch/aarch64/aarch64/trap.c

390

if ((insn & 0xffffffe0) == 0xd53b0020) {

sys/arch/aarch64/aarch64/trap.c

392

unsigned int Xt = insn & 31;

sys/arch/aarch64/aarch64/trap.c

599

fetch_arm_insn(uint64_t pc, uint64_t spsr, uint32_t *insn)

sys/arch/aarch64/aarch64/trap.c

619

*insn = hi;

sys/arch/aarch64/aarch64/trap.c

628

*insn = ((uint32_t)hi << 16) | lo;

sys/arch/aarch64/aarch64/trap.c

632

if (ufetch_32((uint32_t *)pc, insn))

sys/arch/aarch64/aarch64/trap.c

634

LE32TOH(*insn);

sys/arch/aarch64/aarch64/trap.c

640

arm_cond_match(uint32_t insn, uint64_t spsr)

sys/arch/aarch64/aarch64/trap.c

642

bool invert = (insn >> 28) & 1;

sys/arch/aarch64/aarch64/trap.c

645

switch (insn >> 29) {

sys/arch/aarch64/aarch64/trap.c

678

emul_arm_swp(uint32_t insn, struct trapframe *tf)

sys/arch/aarch64/aarch64/trap.c

685

Rn = __SHIFTOUT(insn, 0x000f0000);

sys/arch/aarch64/aarch64/trap.c

686

Rd = __SHIFTOUT(insn, 0x0000f000);

sys/arch/aarch64/aarch64/trap.c

687

Rm = __SHIFTOUT(insn, 0x0000000f);

sys/arch/aarch64/aarch64/trap.c

693

if ((insn & 0x00400000) == 0 && (vaddr & 3) != 0) {

sys/arch/aarch64/aarch64/trap.c

702

if (insn & 0x00400000) {

sys/arch/aarch64/aarch64/trap.c

720

emul_thumb_insn(struct trapframe *tf, uint32_t insn, int insn_size)

sys/arch/aarch64/aarch64/trap.c

726

if (insn == 0xdefe) {

sys/arch/aarch64/aarch64/trap.c

744

uint32_t insn;

sys/arch/aarch64/aarch64/trap.c

747

insn_size = fetch_arm_insn(tf->tf_pc, tf->tf_spsr, &insn);

sys/arch/aarch64/aarch64/trap.c

751

return emul_thumb_insn(tf, insn, insn_size);

sys/arch/aarch64/aarch64/trap.c

756

if (insn == 0xe6000011 || insn == 0xe7ffdefe) {

sys/arch/aarch64/aarch64/trap.c

763

if ((insn & 0xf0000000) == 0xf0000000)

sys/arch/aarch64/aarch64/trap.c

767

if ((insn & 0x0fb00ff0) == 0x01000090) {

sys/arch/aarch64/aarch64/trap.c

768

if (arm_cond_match(insn, tf->tf_spsr)) {

sys/arch/aarch64/aarch64/trap.c

769

if (emul_arm_swp(insn, tf) != 0)

sys/arch/aarch64/aarch64/trap.c

779

switch (insn & 0x0fff0fff) {

sys/arch/aarch64/aarch64/trap.c

781

if (arm_cond_match(insn, tf->tf_spsr)) {

sys/arch/aarch64/aarch64/trap.c

790

if (arm_cond_match(insn, tf->tf_spsr)) {

sys/arch/aarch64/aarch64/trap.c

799

if (arm_cond_match(insn, tf->tf_spsr)) {

sys/arch/aarch64/include/db_machdep.h

110

inst_return(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

112

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

113

return ((insn & 0xfffffc1f) == 0xd65f0000); /* ret xN */

sys/arch/aarch64/include/db_machdep.h

117

inst_trap_return(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

119

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

120

return insn == 0xd69f03e0; /* eret */

sys/arch/aarch64/include/db_machdep.h

124

inst_call(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

126

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

127

return ((insn & 0xfc000000) == 0x94000000) /* bl */

sys/arch/aarch64/include/db_machdep.h

128

|| ((insn & 0xfffffc1f) == 0xd63f0000); /* blr */

sys/arch/aarch64/include/db_machdep.h

132

inst_load(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

134

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

136

((insn & 0xffe00c00) == 0xb8800000) || /* ldursw */

sys/arch/aarch64/include/db_machdep.h

138

((insn & 0xffe00400) == 0xb8800400) ||

sys/arch/aarch64/include/db_machdep.h

139

((insn & 0xffc00c00) == 0xb8800800) || /* ldrsw reg,ldtrsw */

sys/arch/aarch64/include/db_machdep.h

140

((insn & 0xffc00000) == 0xb9800000) || /* ldrsw immunsign */

sys/arch/aarch64/include/db_machdep.h

141

((insn & 0xffc00000) == 0x39400000) || /* ldrb immunsign */

sys/arch/aarch64/include/db_machdep.h

142

((insn & 0xff000000) == 0x98000000) || /* ldrsw literal */

sys/arch/aarch64/include/db_machdep.h

144

((insn & 0xfec00000) == 0x68c00000) ||

sys/arch/aarch64/include/db_machdep.h

146

((insn & 0xefc00000) == 0x69400000) ||

sys/arch/aarch64/include/db_machdep.h

147

((insn & 0xbfff0000) == 0x887f0000) || /* ldaxp,ldxp */

sys/arch/aarch64/include/db_machdep.h

148

((insn & 0xbfc00000) == 0xb9400000) || /* ldr immunsign */

sys/arch/aarch64/include/db_machdep.h

149

((insn & 0xbfa00c00) == 0x38800000) || /* ldursh,ldursb */

sys/arch/aarch64/include/db_machdep.h

151

((insn & 0xbfa00400) == 0x38800400) ||

sys/arch/aarch64/include/db_machdep.h

153

((insn & 0xbf800c00) == 0x38800800) ||

sys/arch/aarch64/include/db_machdep.h

155

((insn & 0xbf800000) == 0x39800000) ||

sys/arch/aarch64/include/db_machdep.h

156

((insn & 0xbf000000) == 0x18000000) || /* ldr literal */

sys/arch/aarch64/include/db_machdep.h

158

((insn & 0x7e400000) == 0x28400000) ||

sys/arch/aarch64/include/db_machdep.h

159

((insn & 0x3ffffc00) == 0x085f7c00) || /* ldxr,ldxr[bh] */

sys/arch/aarch64/include/db_machdep.h

160

((insn & 0x3fe00c00) == 0x38400000) || /* ldur,ldur[bh] */

sys/arch/aarch64/include/db_machdep.h

162

((insn & 0x3fe00400) == 0x38400400) ||

sys/arch/aarch64/include/db_machdep.h

164

((insn & 0x3fc00c00) == 0x38400800) ||

sys/arch/aarch64/include/db_machdep.h

166

((insn & 0x3f7ffc00) == 0x085ffc00);

sys/arch/aarch64/include/db_machdep.h

170

inst_store(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

172

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

174

((insn & 0xbfe00000) == 0x88200000) || /* stlxp,stxp */

sys/arch/aarch64/include/db_machdep.h

176

((insn & 0x7e400000) == 0x28000000) ||

sys/arch/aarch64/include/db_machdep.h

177

((insn & 0x3ffffc00) == 0x089ffc00) || /* stlr,stlr[bh] */

sys/arch/aarch64/include/db_machdep.h

179

((insn & 0x3fe07c00) == 0x08007c00) ||

sys/arch/aarch64/include/db_machdep.h

180

((insn & 0x3fe00c00) == 0x38000000) || /* stur,stur[bh] */

sys/arch/aarch64/include/db_machdep.h

182

((insn & 0x3fe00400) == 0x38000400) ||

sys/arch/aarch64/include/db_machdep.h

184

((insn & 0x3fc00c00) == 0x38000800) ||

sys/arch/aarch64/include/db_machdep.h

186

((insn & 0x3fc00000) == 0x39000000);

sys/arch/aarch64/include/db_machdep.h

194

inst_branch(db_expr_t insn)

sys/arch/aarch64/include/db_machdep.h

196

LE32TOH(insn);

sys/arch/aarch64/include/db_machdep.h

198

((insn & 0xff000010) == 0x54000000) || /* b.cond */

sys/arch/aarch64/include/db_machdep.h

199

((insn & 0xfc000000) == 0x14000000) || /* b imm */

sys/arch/aarch64/include/db_machdep.h

200

((insn & 0xfffffc1f) == 0xd61f0000) || /* br */

sys/arch/aarch64/include/db_machdep.h

201

((insn & 0x7f000000) == 0x35000000) || /* cbnz */

sys/arch/aarch64/include/db_machdep.h

202

((insn & 0x7f000000) == 0x34000000) || /* cbz */

sys/arch/aarch64/include/db_machdep.h

203

((insn & 0x7f000000) == 0x37000000) || /* tbnz */

sys/arch/aarch64/include/db_machdep.h

204

((insn & 0x7f000000) == 0x36000000); /* tbz */

sys/arch/aarch64/include/db_machdep.h

90

#define BKPT_SET(insn, addr) (BKPT_INSN)

sys/arch/alpha/alpha/db_disasm.c

1021

ctx->insn.mem_format.ra);

sys/arch/alpha/alpha/db_disasm.c

1024

register_name(ctx, ctx->insn.mem_format.ra));

sys/arch/alpha/alpha/db_disasm.c

1026

signed_immediate = (long)ctx->insn.mem_format.displacement;

sys/arch/alpha/alpha/db_disasm.c

1033

register_name(ctx, ctx->insn.mem_format.rb));

sys/arch/alpha/alpha/db_disasm.c

1055

signed_immediate = (long)ctx->insn.branch_format.displacement;

sys/arch/alpha/alpha/db_disasm.c

1057

register_name(ctx, ctx->insn.branch_format.ra));

sys/arch/alpha/alpha/db_disasm.c

1068

insn_printf(ctx, "? 0x%x ?", ctx->insn.bits);

sys/arch/alpha/alpha/db_disasm.c

1083

.insn.bits = db_get_value(loc, 4, 0),

sys/arch/alpha/alpha/db_disasm.c

828

opcode = op_name[ctx->insn.mem_format.opcode];

sys/arch/alpha/alpha/db_disasm.c

834

switch (ctx->insn.mem_format.opcode) {

sys/arch/alpha/alpha/db_disasm.c

838

pal_opname(ctx->insn.pal_format.function));

sys/arch/alpha/alpha/db_disasm.c

860

opcode = arit_name(ctx->insn.operate_lit_format.function);

sys/arch/alpha/alpha/db_disasm.c

864

opcode = logical_name(ctx->insn.operate_lit_format.function);

sys/arch/alpha/alpha/db_disasm.c

868

opcode = bitop_name(ctx->insn.operate_lit_format.function);

sys/arch/alpha/alpha/db_disasm.c

872

opcode = mul_name(ctx->insn.operate_lit_format.function);

sys/arch/alpha/alpha/db_disasm.c

878

register_name(ctx, ctx->insn.operate_lit_format.ra));

sys/arch/alpha/alpha/db_disasm.c

879

if (ctx->insn.operate_lit_format.one) {

sys/arch/alpha/alpha/db_disasm.c

881

ctx->insn.operate_lit_format.literal);

sys/arch/alpha/alpha/db_disasm.c

885

ctx->insn.operate_reg_format.rb));

sys/arch/alpha/alpha/db_disasm.c

888

register_name(ctx, ctx->insn.operate_lit_format.rc));

sys/arch/alpha/alpha/db_disasm.c

894

opcode = vaxf_name(ctx->insn.float_format.function);

sys/arch/alpha/alpha/db_disasm.c

898

opcode = ieeef_name(ctx->insn.float_format.function);

sys/arch/alpha/alpha/db_disasm.c

902

opcode = anyf_name(ctx->insn.float_format.function);

sys/arch/alpha/alpha/db_disasm.c

905

ctx->insn.float_format.fa,

sys/arch/alpha/alpha/db_disasm.c

906

ctx->insn.float_format.fb,

sys/arch/alpha/alpha/db_disasm.c

907

ctx->insn.float_format.fc);

sys/arch/alpha/alpha/db_disasm.c

916

code = (ctx->insn.mem_format.displacement)&0xffff;

sys/arch/alpha/alpha/db_disasm.c

923

ctx->insn.mem_format.rb));

sys/arch/alpha/alpha/db_disasm.c

929

ctx->insn.mem_format.rb));

sys/arch/alpha/alpha/db_disasm.c

936

ctx->insn.mem_format.ra));

sys/arch/alpha/alpha/db_disasm.c

949

opcode = jump_name(ctx->insn.jump_format.action);

sys/arch/alpha/alpha/db_disasm.c

950

switch (ctx->insn.jump_format.action) {

sys/arch/alpha/alpha/db_disasm.c

954

register_name(ctx, ctx->insn.jump_format.ra),

sys/arch/alpha/alpha/db_disasm.c

955

register_name(ctx, ctx->insn.jump_format.rb));

sys/arch/alpha/alpha/db_disasm.c

956

signed_immediate = ctx->insn.jump_format.hint;

sys/arch/alpha/alpha/db_disasm.c

962

register_name(ctx, ctx->insn.jump_format.ra),

sys/arch/alpha/alpha/db_disasm.c

963

register_name(ctx, ctx->insn.jump_format.rb));

sys/arch/alpha/alpha/db_disasm.c

971

opcode = intmisc_name(ctx->insn.operate_lit_format.function);

sys/arch/alpha/alpha/db_disasm.c

977

p.bits = ctx->insn.bits;

sys/arch/alpha/alpha/db_disasm.c

985

p.bits = ctx->insn.bits;

sys/arch/alpha/alpha/db_interface.c

391

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

393

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

394

return ((insn.branch_format.opcode == op_bsr) ||

sys/arch/alpha/alpha/db_interface.c

395

((insn.jump_format.opcode == op_j) &&

sys/arch/alpha/alpha/db_interface.c

396

(insn.jump_format.action & 1)));

sys/arch/alpha/alpha/db_interface.c

402

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

404

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

405

return ((insn.jump_format.opcode == op_j) &&

sys/arch/alpha/alpha/db_interface.c

406

(insn.jump_format.action == op_ret));

sys/arch/alpha/alpha/db_interface.c

412

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

414

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

415

return ((insn.pal_format.opcode == op_pal) &&

sys/arch/alpha/alpha/db_interface.c

416

(insn.pal_format.function == PAL_OSF1_rti));

sys/arch/alpha/alpha/db_interface.c

422

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

424

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

425

switch (insn.branch_format.opcode) {

sys/arch/alpha/alpha/db_interface.c

451

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

453

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

454

switch (insn.branch_format.opcode) {

sys/arch/alpha/alpha/db_interface.c

460

switch (insn.pal_format.function) {

sys/arch/alpha/alpha/db_interface.c

475

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

477

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

478

return ((insn.mem_format.opcode == op_stq) &&

sys/arch/alpha/alpha/db_interface.c

479

(insn.mem_format.rd == regn));

sys/arch/alpha/alpha/db_interface.c

486

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

488

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

491

if (insn.mem_format.opcode == op_ldbu ||

sys/arch/alpha/alpha/db_interface.c

492

insn.mem_format.opcode == op_ldq_u ||

sys/arch/alpha/alpha/db_interface.c

493

insn.mem_format.opcode == op_ldwu)

sys/arch/alpha/alpha/db_interface.c

495

if ((insn.mem_format.opcode >= op_ldf) &&

sys/arch/alpha/alpha/db_interface.c

496

(insn.mem_format.opcode <= op_ldt))

sys/arch/alpha/alpha/db_interface.c

498

if ((insn.mem_format.opcode >= op_ldl) &&

sys/arch/alpha/alpha/db_interface.c

499

(insn.mem_format.opcode <= op_ldq_l))

sys/arch/alpha/alpha/db_interface.c

503

if (insn.mem_format.opcode == op_special) {

sys/arch/alpha/alpha/db_interface.c

505

if ((insn.mem_format.displacement == (short)op_fetch) ||

sys/arch/alpha/alpha/db_interface.c

506

(insn.mem_format.displacement == (short)op_fetch_m))

sys/arch/alpha/alpha/db_interface.c

516

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

518

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

521

if (insn.mem_format.opcode == op_stw ||

sys/arch/alpha/alpha/db_interface.c

522

insn.mem_format.opcode == op_stb ||

sys/arch/alpha/alpha/db_interface.c

523

insn.mem_format.opcode == op_stq_u)

sys/arch/alpha/alpha/db_interface.c

525

if ((insn.mem_format.opcode >= op_stf) &&

sys/arch/alpha/alpha/db_interface.c

526

(insn.mem_format.opcode <= op_stt))

sys/arch/alpha/alpha/db_interface.c

528

if ((insn.mem_format.opcode >= op_stl) &&

sys/arch/alpha/alpha/db_interface.c

529

(insn.mem_format.opcode <= op_stq_c))

sys/arch/alpha/alpha/db_interface.c

533

if (insn.mem_format.opcode == op_special) {

sys/arch/alpha/alpha/db_interface.c

534

if (insn.mem_format.displacement == op_mb)

sys/arch/alpha/alpha/db_interface.c

545

alpha_instruction insn;

sys/arch/alpha/alpha/db_interface.c

548

insn.bits = ins;

sys/arch/alpha/alpha/db_interface.c

549

switch (insn.branch_format.opcode) {

sys/arch/alpha/alpha/db_interface.c

554

newpc = db_register_value(regs, insn.jump_format.rb) & ~3;

sys/arch/alpha/alpha/db_interface.c

577

signed_immediate = insn.branch_format.displacement;

sys/arch/alpha/alpha/fp_complete.c

531

.insn.bits = bits,

sys/arch/alpha/alpha/fp_complete.c

542

alpha_instruction insn = {

sys/arch/alpha/alpha/fp_complete.c

547

insn.float_format.opcode, insn.float_format.function,

sys/arch/alpha/alpha/fp_complete.c

548

insn.float_format.fa, insn.float_format.fb, insn.float_format.fc);

sys/arch/alpha/alpha/fp_complete.c

551

insn.float_detail.trp, insn.float_detail.rnd,

sys/arch/alpha/alpha/fp_complete.c

552

insn.float_detail.src, insn.float_detail.opclass);

sys/arch/alpha/alpha/patch.c

71

alpha_instruction insn = {

sys/arch/alpha/alpha/patch.c

82

*lock_stub_patch_table[i] = insn.bits;

sys/arch/alpha/include/alpha_instruction.h

751

alpha_instruction insn; /* instruction bits */

sys/arch/arm/arm/disassem.c

435

u_int insn;

sys/arch/arm/arm/disassem.c

449

insn = di->di_readword(loc);

sys/arch/arm/arm/disassem.c

451

insn = bswap32(insn);

sys/arch/arm/arm/disassem.c

459

if ((insn & i_ptr->mask) == i_ptr->pattern) {

sys/arch/arm/arm/disassem.c

467

di->di_printf("und%s\t%08x\n", insn_condition(insn), insn);

sys/arch/arm/arm/disassem.c

475

di->di_printf("%s%s", i_ptr->name, insn_condition(insn));

sys/arch/arm/arm/disassem.c

493

disasm_cps(di, insn);

sys/arch/arm/arm/disassem.c

497

di->di_printf("#%d", insn & 0xf);

sys/arch/arm/arm/disassem.c

501

di->di_printf("%s", insn_limitation(insn));

sys/arch/arm/arm/disassem.c

505

di->di_printf(", #%d", insn & 0x1f);

sys/arch/arm/arm/disassem.c

511

if (insn & 0x02000000) {

sys/arch/arm/arm/disassem.c

512

int rotate = ((insn >> 7) & 0x1e);

sys/arch/arm/arm/disassem.c

513

int imm = (insn & 0xff) << (32 - rotate) |

sys/arch/arm/arm/disassem.c

514

(insn & 0xff) >> rotate;

sys/arch/arm/arm/disassem.c

518

disasm_register_shift(di, insn);

sys/arch/arm/arm/disassem.c

523

disasm_register_print(di, (insn >> 12) & 0x0f);

sys/arch/arm/arm/disassem.c

528

((insn >> 18) & 0x10)|((insn >> 12) & 0x0f));

sys/arch/arm/arm/disassem.c

532

if (((insn >> 12) & 0x0f) == 15)

sys/arch/arm/arm/disassem.c

537

disasm_register_print(di, (insn >> 16) & 0x0f);

sys/arch/arm/arm/disassem.c

542

((insn >> 3) & 0x10)|((insn >> 16) & 0x0f));

sys/arch/arm/arm/disassem.c

546

di->di_printf("r%d", ((insn >> 8) & 0x0f));

sys/arch/arm/arm/disassem.c

550

di->di_printf("[r%d]", ((insn >> 16) & 0x0f));

sys/arch/arm/arm/disassem.c

554

di->di_printf("r%d", ((insn >> 0) & 0x0f));

sys/arch/arm/arm/disassem.c

559

((insn >> 1) & 0x10)|(insn & 0x0f));

sys/arch/arm/arm/disassem.c

563

disasm_insn_ldrstr(di, insn, loc);

sys/arch/arm/arm/disassem.c

567

disasm_insn_ldrxstrx(di, insn, loc);

sys/arch/arm/arm/disassem.c

571

disasm_print_reglist(di, insn);

sys/arch/arm/arm/disassem.c

575

di->di_printf("f%d", (insn >> 12) & 7);

sys/arch/arm/arm/disassem.c

579

di->di_printf("f%d", (insn >> 16) & 7);

sys/arch/arm/arm/disassem.c

583

if (insn & (1 << 3))

sys/arch/arm/arm/disassem.c

584

di->di_printf("#%s", insn_fpaimm(insn));

sys/arch/arm/arm/disassem.c

586

di->di_printf("f%d", insn & 7);

sys/arch/arm/arm/disassem.c

590

di->di_printf("#%d", (insn >> 7) & 0x1f);

sys/arch/arm/arm/disassem.c

595

((insn >> 16) & 0x1f) - ((insn >> 7) & 0x1f) + 1);

sys/arch/arm/arm/disassem.c

599

di->di_printf("#%d", ((insn >> 16) & 0x1f) + 1);

sys/arch/arm/arm/disassem.c

603

branch = ((insn << 2) & 0x03ffffff);

sys/arch/arm/arm/disassem.c

610

branch = ((insn << 2) & 0x03ffffff) |

sys/arch/arm/arm/disassem.c

611

(insn >> 23 & 0x00000002);

sys/arch/arm/arm/disassem.c

617

if (insn & 0x40)

sys/arch/arm/arm/disassem.c

621

if (insn & (1 << 24))

sys/arch/arm/arm/disassem.c

626

8 << ((insn >> 20) & 3));

sys/arch/arm/arm/disassem.c

630

di->di_printf("%s", insn_blktrans(insn));

sys/arch/arm/arm/disassem.c

634

di->di_printf("%s", insn_stkblktrans(insn));

sys/arch/arm/arm/disassem.c

639

((insn & 0xf0000) >> 4) | (insn & 0xfff));

sys/arch/arm/arm/disassem.c

643

di->di_printf("0x%08x", (insn & 0x00ffffff));

sys/arch/arm/arm/disassem.c

648

(insn & 0x000fff00) >> 4 | (insn & 0x0000000f));

sys/arch/arm/arm/disassem.c

652

if (insn & 0x00400000)

sys/arch/arm/arm/disassem.c

659

if ((insn & 0x000c0000) == 0x000c0000)

sys/arch/arm/arm/disassem.c

661

else if ((insn & 0x000c0000) == 0x00080000)

sys/arch/arm/arm/disassem.c

667

if (insn & (1 << 16))

sys/arch/arm/arm/disassem.c

669

if (insn & (1 << 17))

sys/arch/arm/arm/disassem.c

671

if (insn & (1 << 18))

sys/arch/arm/arm/disassem.c

673

if (insn & (1 << 19))

sys/arch/arm/arm/disassem.c

678

if (insn & 0x00400000)

sys/arch/arm/arm/disassem.c

683

if (insn & (1 << 22))

sys/arch/arm/arm/disassem.c

688

if (insn & 0x00100000)

sys/arch/arm/arm/disassem.c

693

di->di_printf("%s", insn_fpaprec(insn));

sys/arch/arm/arm/disassem.c

700

di->di_printf("%s", insn_fparnd(insn));

sys/arch/arm/arm/disassem.c

704

if (insn & (1 << 21))

sys/arch/arm/arm/disassem.c

709

di->di_printf("p%d", (insn >> 8) & 0x0f);

sys/arch/arm/arm/disassem.c

713

disasm_insn_ldcstc(di, insn, loc);

sys/arch/arm/arm/disassem.c

717

di->di_printf("0x%08x", insn);

sys/arch/arm/arm/disassem.c

721

di->di_printf("%d, ", (insn >> 20) & 0x0f);

sys/arch/arm/arm/disassem.c

723

di->di_printf("c%d, c%d, c%d", (insn >> 12) & 0x0f,

sys/arch/arm/arm/disassem.c

724

(insn >> 16) & 0x0f, insn & 0x0f);

sys/arch/arm/arm/disassem.c

726

di->di_printf(", %d", (insn >> 5) & 0x07);

sys/arch/arm/arm/disassem.c

730

di->di_printf("%d, ", (insn >> 21) & 0x07);

sys/arch/arm/arm/disassem.c

732

(insn >> 12) & 0x0f, (insn >> 16) & 0x0f,

sys/arch/arm/arm/disassem.c

733

insn & 0x0f, (insn >> 5) & 0x07);

sys/arch/arm/arm/disassem.c

741

(insn >> 4) & 0x0f, (insn >> 12) & 0x0f,

sys/arch/arm/arm/disassem.c

742

(insn >> 16) & 0x0f, insn & 0x0f);

sys/arch/arm/arm/disassem.c

784

disasm_cps(const disasm_interface_t *di, u_int insn)

sys/arch/arm/arm/disassem.c

786

if ((insn & 0x000c0000) == 0x000c0000 ||

sys/arch/arm/arm/disassem.c

787

(insn & 0x000c0000) == 0x00080000) {

sys/arch/arm/arm/disassem.c

788

if (insn & (1 << 8))

sys/arch/arm/arm/disassem.c

790

if (insn & (1 << 7))

sys/arch/arm/arm/disassem.c

792

if (insn & (1 << 6))

sys/arch/arm/arm/disassem.c

794

if ((insn & (1 << 17)) && ((insn & 0x1f) != 0))

sys/arch/arm/arm/disassem.c

797

if ((insn & (1 << 17)) && ((insn & 0x1f) != 0))

sys/arch/arm/arm/disassem.c

798

di->di_printf("#%d", insn & 0x1f);

sys/arch/arm/arm/disassem.c

802

disasm_register_shift(const disasm_interface_t *di, u_int insn)

sys/arch/arm/arm/disassem.c

804

di->di_printf("r%d", (insn & 0x0f));

sys/arch/arm/arm/disassem.c

805

if ((insn & 0x00000ff0) == 0)

sys/arch/arm/arm/disassem.c

807

else if ((insn & 0x00000ff0) == 0x00000060)

sys/arch/arm/arm/disassem.c

810

if (insn & 0x10)

sys/arch/arm/arm/disassem.c

811

di->di_printf(", %s r%d", op2_shift(insn),

sys/arch/arm/arm/disassem.c

812

(insn >> 8) & 0x0f);

sys/arch/arm/arm/disassem.c

814

di->di_printf(", %s #%d", op2_shift(insn),

sys/arch/arm/arm/disassem.c

815

(insn >> 7) & 0x1f);

sys/arch/arm/arm/disassem.c

821

disasm_print_reglist(const disasm_interface_t *di, u_int insn)

sys/arch/arm/arm/disassem.c

833

if (loop == 16 || !(insn & (1 << loop))) {

sys/arch/arm/arm/disassem.c

845

if (insn & (1 << loop))

sys/arch/arm/arm/disassem.c

851

if (insn & (1 << 22))

sys/arch/arm/arm/disassem.c

856

disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn, u_int loc)

sys/arch/arm/arm/disassem.c

860

offset = insn & 0xfff;

sys/arch/arm/arm/disassem.c

861

if ((insn & 0x032f0000) == 0x010f0000) {

sys/arch/arm/arm/disassem.c

863

if (insn & 0x00800000)

sys/arch/arm/arm/disassem.c

869

di->di_printf("[r%d", (insn >> 16) & 0x0f);

sys/arch/arm/arm/disassem.c

870

if ((insn & 0x03000fff) != 0x01000000

sys/arch/arm/arm/disassem.c

871

&& (insn & 0x0f800ff0) != 0x01800f90) {

sys/arch/arm/arm/disassem.c

872

di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");

sys/arch/arm/arm/disassem.c

873

if (!(insn & 0x00800000))

sys/arch/arm/arm/disassem.c

875

if (insn & (1 << 25))

sys/arch/arm/arm/disassem.c

876

disasm_register_shift(di, insn);

sys/arch/arm/arm/disassem.c

880

if (insn & (1 << 24))

sys/arch/arm/arm/disassem.c

886

disasm_insn_ldrxstrx(const disasm_interface_t *di, u_int insn, u_int loc)

sys/arch/arm/arm/disassem.c

890

offset = ((insn & 0xf00) >> 4) | (insn & 0xf);

sys/arch/arm/arm/disassem.c

891

if ((insn & 0x004f0000) == 0x004f0000) {

sys/arch/arm/arm/disassem.c

893

if (insn & 0x00800000)

sys/arch/arm/arm/disassem.c

899

di->di_printf("[r%d", (insn >> 16) & 0x0f);

sys/arch/arm/arm/disassem.c

900

if ((insn & 0x01400f0f) != 0x01400000) {

sys/arch/arm/arm/disassem.c

901

di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");

sys/arch/arm/arm/disassem.c

902

char const *sign = (insn & 0x00800000) ? "" : "-";

sys/arch/arm/arm/disassem.c

903

if (insn & (1 << 22))

sys/arch/arm/arm/disassem.c

906

di->di_printf("%sr%d", sign, (insn & 0x0f));

sys/arch/arm/arm/disassem.c

908

if (insn & (1 << 24)) {

sys/arch/arm/arm/disassem.c

910

if (__SHIFTOUT(insn, __BIT(21)))

sys/arch/arm/arm/disassem.c

917

disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int loc)

sys/arch/arm/arm/disassem.c

919

if (((insn >> 8) & 0xf) == 1)

sys/arch/arm/arm/disassem.c

920

di->di_printf("f%d, ", (insn >> 12) & 0x07);

sys/arch/arm/arm/disassem.c

922

di->di_printf("c%d, ", (insn >> 12) & 0x0f);

sys/arch/arm/arm/disassem.c

924

di->di_printf("[r%d", (insn >> 16) & 0x0f);

sys/arch/arm/arm/disassem.c

926

di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");

sys/arch/arm/arm/disassem.c

928

if (!(insn & (1 << 23)))

sys/arch/arm/arm/disassem.c

931

di->di_printf("#0x%03x", (insn & 0xff) << 2);

sys/arch/arm/arm/disassem.c

933

if (insn & (1 << 24))

sys/arch/arm/arm/disassem.c

936

if (insn & (1 << 21))

sys/arch/arm/arm/linux_syscall.c

111

linux_syscall_plain(trapframe_t *frame, struct lwp *l, uint32_t insn)

sys/arch/arm/arm/linux_syscall.c

118

code = insn & 0x00ffffff;

sys/arch/arm/arm/linux_syscall.c

162

linux_syscall_fancy(trapframe_t *frame, struct lwp *l, uint32_t insn)

sys/arch/arm/arm/linux_syscall.c

169

code = insn & 0x00ffffff;

sys/arch/arm/arm/syscall.c

132

insn = 0xef000000 | SWI_OS_NETBSD | tf->tf_r0;

sys/arch/arm/arm/syscall.c

138

insn = read_insn(tf->tf_pc - INSN_SIZE, true);

sys/arch/arm/arm/syscall.c

160

if ((insn & 0x0f000000) != 0x0f000000) {

sys/arch/arm/arm/syscall.c

170

(*l->l_proc->p_md.md_syscall)(tf, l, insn);

sys/arch/arm/arm/syscall.c

182

syscall(struct trapframe *tf, lwp_t *l, uint32_t insn)

sys/arch/arm/arm/syscall.c

194

const uint32_t os_mask = insn & SWI_OS_MASK;

sys/arch/arm/arm/syscall.c

195

uint32_t code = insn & 0x000fffff;

sys/arch/arm/arm/syscall.c

201

const uint32_t swi = __SHIFTOUT(insn, __BITS(23,0));

sys/arch/arm/arm/syscall.c

217

ksi.ksi_trap = insn;

sys/arch/arm/arm/syscall.c

97

uint32_t insn;

sys/arch/arm/arm/undefined.c

126

cp15_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)

sys/arch/arm/arm/undefined.c

140

const u_int regno = (insn >> 12) & 15;

sys/arch/arm/arm/undefined.c

152

if ((insn & 0xffff0fff) == 0xee1d0f70) {

sys/arch/arm/arm/undefined.c

162

if ((insn & 0xffef0fff) == 0xee0d0f50) {

sys/arch/arm/arm/undefined.c

164

if (insn & 0x00100000)

sys/arch/arm/arm/undefined.c

177

gdb_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)

sys/arch/arm/arm/undefined.c

183

if (insn == GDB_THUMB_BREAKPOINT)

sys/arch/arm/arm/undefined.c

189

if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {

sys/arch/arm/arm/undefined.c

221

vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code)

sys/arch/arm/arm/undefined.c

261

u_int insn = read_insn(addr, false);

sys/arch/arm/arm/undefined.c

266

if (!DTRACE_IS_BREAKPOINT(insn))

sys/arch/arm/arm/undefined.c

270

if (!arm_cond_ok_p(__SHIFTIN(insn, INSN_COND_MASK), frame->tf_spsr)) {

sys/arch/arm/arm32/db_interface.c

388

branch_taken(u_int insn, u_int pc, db_regs_t *regs)

sys/arch/arm/arm32/db_interface.c

392

switch ((insn >> 24) & 0xf) {

sys/arch/arm/arm32/db_interface.c

395

addr = ((insn << 2) & 0x03ffffff);

sys/arch/arm/arm32/db_interface.c

400

addr = db_fetch_reg(insn & 0xf, regs);

sys/arch/arm/arm32/db_interface.c

405

addr = db_fetch_reg((insn >> 16) & 0xf, regs);

sys/arch/arm/arm32/db_interface.c

409

addr = db_fetch_reg(insn & 0xf, regs);

sys/arch/arm/arm32/db_interface.c

413

addr = db_fetch_reg((insn >> 16) & 0xf, regs);

sys/arch/arm/arm32/db_interface.c

414

nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);

sys/arch/arm/arm32/db_interface.c

418

switch ((insn >> 23) & 0x3) {

sys/arch/arm/arm32/fault.c

416

u_int insn = read_thumb_insn(tf->tf_pc, user);

sys/arch/arm/arm32/fault.c

417

u_int insn_f8 = insn & 0xf800;

sys/arch/arm/arm32/fault.c

418

u_int insn_fe = insn & 0xfe00;

sys/arch/arm/arm32/fault.c

435

u_int insn = read_insn(tf->tf_pc, user);

sys/arch/arm/arm32/fault.c

437

if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */

sys/arch/arm/arm32/fault.c

438

((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/

sys/arch/arm/arm32/fault.c

439

((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/

sys/arch/arm/arm32/fault.c

440

((insn & 0x0f9000f0) == 0x01800090)) /* STREX[BDH] */

sys/arch/arm/arm32/fault.c

442

else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */

sys/arch/arm/include/armreg.h

690

arm_cond_ok_p(uint32_t insn, uint32_t psr)

sys/arch/arm/include/armreg.h

692

const uint32_t __cond = __SHIFTOUT(insn, INSN_COND_MASK);

sys/arch/arm/include/db_machdep.h

120

u_int branch_taken(u_int insn, u_int pc, db_regs_t *db_regs);

sys/arch/arm/include/locore.h

208

uint32_t insn;

sys/arch/arm/include/locore.h

210

__asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va));

sys/arch/arm/include/locore.h

212

insn = *(const uint32_t *)va;

sys/arch/arm/include/locore.h

215

insn = bswap32(insn);

sys/arch/arm/include/locore.h

217

return insn;

sys/arch/arm/include/locore.h

227

uint32_t insn;

sys/arch/arm/include/locore.h

230

__asm __volatile("ldrht %0, [%1, #0]" : "=&r"(insn) : "r"(va));

sys/arch/arm/include/locore.h

232

__asm __volatile("ldrht %0, [%1], #0" : "=&r"(insn) : "r"(va));

sys/arch/arm/include/locore.h

234

__asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va & ~3));

sys/arch/arm/include/locore.h

236

insn = (uint16_t) (insn >> (((va ^ 2) & 2) << 3));

sys/arch/arm/include/locore.h

238

insn = (uint16_t) (insn >> ((va & 2) << 3));

sys/arch/arm/include/locore.h

242

insn = *(const uint16_t *)va;

sys/arch/arm/include/locore.h

245

insn = bswap16(insn);

sys/arch/arm/include/locore.h

247

return insn;

sys/arch/arm/include/trap.h

73

#define DTRACE_IS_BREAKPOINT(insn) ((insn & DTRACE_BREAKPOINT_MASK) == DTRACE_BREAKPOINT)

sys/arch/arm/vfp/vfp_init.c

181

vfp_fpscr_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code)

sys/arch/arm/vfp/vfp_init.c

184

const u_int regno = (insn >> 12) & 0xf;

sys/arch/arm/vfp/vfp_init.c

189

if ((insn & 0xffef0fff) != 0xeee10a10 || regno > 12)

sys/arch/arm/vfp/vfp_init.c

212

if (insn & 0x00100000) {

sys/arch/arm/vfp/vfp_init.c

405

vfp_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code)

sys/arch/arm/vfp/vfp_init.c

488

neon_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code)

sys/arch/arm/vfp/vfp_init.c

496

if ((insn & 0xfe000000) != 0xf2000000

sys/arch/arm/vfp/vfp_init.c

497

&& (insn & 0xfe000000) != 0xf4000000)

sys/arch/evbmips/rmixl/machdep.c

504

const uint32_t insn = *insnp;

sys/arch/evbmips/rmixl/machdep.c

505

if (__predict_false((insn & LOAD_CURCPU_MASK) == LOAD_CURCPU)) {

sys/arch/evbmips/rmixl/machdep.c

511

*insnp = insn ^ LOAD_CURCPU ^ MFC0_CURCPU;

sys/arch/hppa/hppa/db_disasm.c

1303

addDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1312

unitDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1324

iaDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1337

shdDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1350

extrDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1360

vextrDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1370

depDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1380

vdepDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1390

depiDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1399

vdepiDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1513

ldDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1539

stDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1564

ldxDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1598

stsDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1622

stbysDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1646

limmDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1655

blDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1676

brDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1684

bvDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1692

beDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1714

cbDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1731

cbiDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1748

bbDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1765

ariDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1780

scDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1811

mmgtDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1868

brkDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1875

floatDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

1980

fcoprDasm(union insn w, u_int op1, u_int op2)

sys/arch/hppa/hppa/db_disasm.c

2063

coprDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

2150

lpkDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

2183

diagDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

2202

fmpysubDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

2216

fmpyaddDasm(const struct inst *i, OFS ofs, union insn w)

sys/arch/hppa/hppa/db_disasm.c

2241

union insn instruct;

sys/arch/hppa/hppa/db_disasm.c

769

int (*dasmfcn)(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

902

int fcoprDasm(union insn, u_int, u_int);

sys/arch/hppa/hppa/db_disasm.c

907

int blDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

908

int ldDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

909

int stDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

910

int addDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

911

int unitDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

912

int iaDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

913

int shdDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

914

int extrDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

915

int vextrDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

916

int depDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

917

int vdepDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

918

int depiDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

919

int vdepiDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

920

int limmDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

921

int brkDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

922

int lpkDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

923

int fmpyaddDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

924

int fmpysubDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

925

int floatDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

926

int coprDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

927

int diagDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

928

int scDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

929

int mmgtDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

930

int ldxDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

931

int stsDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

932

int stbysDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

933

int brDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

934

int bvDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

935

int beDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

936

int cbDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

937

int cbiDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

938

int bbDasm(const struct inst *, OFS, union insn);

sys/arch/hppa/hppa/db_disasm.c

939

int ariDasm(const struct inst *, OFS, union insn);

sys/arch/m68k/fpe/fpu_calcea.c

109

__func__, (void *)ea->ea_fea, insn->is_datasize));

sys/arch/m68k/fpe/fpu_calcea.c

120

if (insn->is_datasize == 12)

sys/arch/m68k/fpe/fpu_calcea.c

150

sig = fetch_disp(frame, insn, 1, &ea->ea_offset);

sys/arch/m68k/fpe/fpu_calcea.c

157

sig = decode_ea6(frame, insn, ea, modreg);

sys/arch/m68k/fpe/fpu_calcea.c

166

sig = fetch_disp(frame, insn, 1,

sys/arch/m68k/fpe/fpu_calcea.c

174

sig = fetch_disp(frame, insn, 2,

sys/arch/m68k/fpe/fpu_calcea.c

182

sig = fetch_disp(frame, insn, 1,

sys/arch/m68k/fpe/fpu_calcea.c

190

sig = decode_ea6(frame, insn, ea, modreg);

sys/arch/m68k/fpe/fpu_calcea.c

212

decode_ea6(struct frame *frame, struct instruction *insn, struct insn_ea *ea,

sys/arch/m68k/fpe/fpu_calcea.c

221

if (ufetch_short((void *)(insn->is_pc + insn->is_advance), &extword))

sys/arch/m68k/fpe/fpu_calcea.c

223

insn->is_advance += 2;

sys/arch/m68k/fpe/fpu_calcea.c

256

sig = fetch_disp(frame, insn, bd_size, &basedisp);

sys/arch/m68k/fpe/fpu_calcea.c

261

sig = fetch_disp(frame, insn, od_size, &outerdisp);

sys/arch/m68k/fpe/fpu_calcea.c

298

fpu_load_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea,

sys/arch/m68k/fpe/fpu_calcea.c

313

len = insn->is_datasize;

sys/arch/m68k/fpe/fpu_calcea.c

387

src = (char *)insn->is_pc + 4;

sys/arch/m68k/fpe/fpu_calcea.c

439

fpu_store_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea,

sys/arch/m68k/fpe/fpu_calcea.c

459

len = insn->is_datasize;

sys/arch/m68k/fpe/fpu_calcea.c

553

fetch_immed(struct frame *frame, struct instruction *insn, int *dst)

sys/arch/m68k/fpe/fpu_calcea.c

558

ext_bytes = insn->is_datasize;

sys/arch/m68k/fpe/fpu_calcea.c

561

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

576

insn->is_advance += 2;

sys/arch/m68k/fpe/fpu_calcea.c

580

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

583

insn->is_advance += 2;

sys/arch/m68k/fpe/fpu_calcea.c

588

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

593

if (ufetch_short((void *)(insn->is_pc + insn->is_advance + 2),

sys/arch/m68k/fpe/fpu_calcea.c

596

insn->is_advance += 4;

sys/arch/m68k/fpe/fpu_calcea.c

600

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

605

if (ufetch_short((void *)(insn->is_pc + insn->is_advance + 2),

sys/arch/m68k/fpe/fpu_calcea.c

608

insn->is_advance += 4;

sys/arch/m68k/fpe/fpu_calcea.c

619

fetch_disp(struct frame *frame, struct instruction *insn, int size, int *res)

sys/arch/m68k/fpe/fpu_calcea.c

625

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

633

insn->is_advance += 2;

sys/arch/m68k/fpe/fpu_calcea.c

635

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_calcea.c

640

if (ufetch_short((void *)(insn->is_pc + insn->is_advance + 2),

sys/arch/m68k/fpe/fpu_calcea.c

644

insn->is_advance += 4;

sys/arch/m68k/fpe/fpu_calcea.c

71

fpu_decode_ea(struct frame *frame, struct instruction *insn,

sys/arch/m68k/fpe/fpu_calcea.c

77

if (insn->is_datasize < 0)

sys/arch/m68k/fpe/fpu_calcea.c

95

sig = fetch_immed(frame, insn, &ea->ea_immed[0]);

sys/arch/m68k/fpe/fpu_calcea.c

97

__func__, insn->is_datasize));

sys/arch/m68k/fpe/fpu_emulate.c

1059

fpu_emul_type1(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_emulate.c

106

insn.is_pc = frame->f_pc;

sys/arch/m68k/fpe/fpu_emulate.c

1065

branch = test_cc(fe, insn->is_word1);

sys/arch/m68k/fpe/fpu_emulate.c

107

insn.is_nextpc = 0;

sys/arch/m68k/fpe/fpu_emulate.c

1071

switch (insn->is_opcode & 070) {

sys/arch/m68k/fpe/fpu_emulate.c

1075

insn->is_advance = 6;

sys/arch/m68k/fpe/fpu_emulate.c

1078

uint16_t count = frame->f_regs[insn->is_opcode & 7];

sys/arch/m68k/fpe/fpu_emulate.c

1081

if (ufetch_short((void *)(insn->is_pc +

sys/arch/m68k/fpe/fpu_emulate.c

1082

insn->is_advance),

sys/arch/m68k/fpe/fpu_emulate.c

1094

insn->is_advance += displ;

sys/arch/m68k/fpe/fpu_emulate.c

1096

insn->is_nextpc = insn->is_pc +

sys/arch/m68k/fpe/fpu_emulate.c

1097

insn->is_advance;

sys/arch/m68k/fpe/fpu_emulate.c

1100

insn->is_advance = 6;

sys/arch/m68k/fpe/fpu_emulate.c

1103

frame->f_regs[insn->is_opcode & 7] &= 0xffff0000;

sys/arch/m68k/fpe/fpu_emulate.c

1104

frame->f_regs[insn->is_opcode & 7] |= (uint32_t)count;

sys/arch/m68k/fpe/fpu_emulate.c

1110

if ((insn->is_opcode & 07) >= 2) {

sys/arch/m68k/fpe/fpu_emulate.c

1111

switch (insn->is_opcode & 07) {

sys/arch/m68k/fpe/fpu_emulate.c

1122

insn->is_advance = advance;

sys/arch/m68k/fpe/fpu_emulate.c

1133

insn->is_datasize = 1; /* always byte */

sys/arch/m68k/fpe/fpu_emulate.c

1134

sig = fpu_decode_ea(frame, insn, &insn->is_ea, insn->is_opcode);

sys/arch/m68k/fpe/fpu_emulate.c

1139

sig = fpu_store_ea(frame, insn, &insn->is_ea, (char *)&branch);

sys/arch/m68k/fpe/fpu_emulate.c

1151

fpu_emul_brcc(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_emulate.c

1160

displ = insn->is_word1;

sys/arch/m68k/fpe/fpu_emulate.c

1162

if (insn->is_opcode & 0x40) {

sys/arch/m68k/fpe/fpu_emulate.c

1163

if (ufetch_short((void *)(insn->is_pc + insn->is_advance),

sys/arch/m68k/fpe/fpu_emulate.c

1171

insn->is_advance += 2;

sys/arch/m68k/fpe/fpu_emulate.c

1179

sig = test_cc(fe, insn->is_opcode);

sys/arch/m68k/fpe/fpu_emulate.c

1189

insn->is_advance = displ + 2;

sys/arch/m68k/fpe/fpu_emulate.c

1191

insn->is_nextpc = insn->is_pc + insn->is_advance;

sys/arch/m68k/fpe/fpu_emulate.c

1197

insn->is_pc + insn->is_advance, insn->is_pc, insn->is_advance,

sys/arch/m68k/fpe/fpu_emulate.c

122

insn.is_nextpc = frame->f_pc;

sys/arch/m68k/fpe/fpu_emulate.c

124

insn.is_pc = frame->f_fmt4.f_fslw;

sys/arch/m68k/fpe/fpu_emulate.c

125

frame->f_pc = insn.is_pc;

sys/arch/m68k/fpe/fpu_emulate.c

128

if (ufetch_short((void *)(insn.is_pc), &sval)) {

sys/arch/m68k/fpe/fpu_emulate.c

144

insn.is_opcode = sval;

sys/arch/m68k/fpe/fpu_emulate.c

147

if (ufetch_short((void *)(insn.is_pc + 2), &sval)) {

sys/arch/m68k/fpe/fpu_emulate.c

151

insn.is_word1 = sval;

sys/arch/m68k/fpe/fpu_emulate.c

153

insn.is_advance = 4;

sys/arch/m68k/fpe/fpu_emulate.c

155

DUMP_INSN(&insn);

sys/arch/m68k/fpe/fpu_emulate.c

167

sig = fpu_emul_fmovm(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

170

sig = fpu_emul_fmovmcr(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

176

sig = fpu_emul_fstore(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

180

sig = fpu_emul_fmovecr(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

184

sig = fpu_emul_fscale(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

188

sig = fpu_emul_arith(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

199

sig = fpu_emul_brcc(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

203

sig = fpu_emul_type1(&fe, &insn);

sys/arch/m68k/fpe/fpu_emulate.c

214

insn.is_opcode));

sys/arch/m68k/fpe/fpu_emulate.c

218

DUMP_INSN(&insn);

sys/arch/m68k/fpe/fpu_emulate.c

226

frame->f_pc += insn.is_advance;

sys/arch/m68k/fpe/fpu_emulate.c

230

sig, insn.is_opcode, insn.is_word1);

sys/arch/m68k/fpe/fpu_emulate.c

237

if (insn.is_nextpc)

sys/arch/m68k/fpe/fpu_emulate.c

238

frame->f_pc = insn.is_nextpc;

sys/arch/m68k/fpe/fpu_emulate.c

333

fpu_emul_fmovmcr(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_emulate.c

345

reglist = (insn->is_word1 & 0x1c00) >> 10;

sys/arch/m68k/fpe/fpu_emulate.c

347

fpu_to_mem = insn->is_word1 & 0x2000;

sys/arch/m68k/fpe/fpu_emulate.c

350

modreg = insn->is_opcode & 077;

sys/arch/m68k/fpe/fpu_emulate.c

377

insn->is_datasize = regcount * 4;

sys/arch/m68k/fpe/fpu_emulate.c

378

sig = fpu_decode_ea(frame, insn, &insn->is_ea, modreg);

sys/arch/m68k/fpe/fpu_emulate.c

386

if ((insn->is_ea.ea_flags & EA_DIRECT)) {

sys/arch/m68k/fpe/fpu_emulate.c

387

if (insn->is_ea.ea_regnum < 8) {

sys/arch/m68k/fpe/fpu_emulate.c

411

sig = fpu_store_ea(frame, insn, &insn->is_ea, (char *)tmp);

sys/arch/m68k/fpe/fpu_emulate.c

415

sig = fpu_load_ea(frame, insn, &insn->is_ea, (char *)tmp);

sys/arch/m68k/fpe/fpu_emulate.c

445

fpu_emul_fmovm(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_emulate.c

456

insn->is_datasize = 12;

sys/arch/m68k/fpe/fpu_emulate.c

457

word1 = insn->is_word1;

sys/arch/m68k/fpe/fpu_emulate.c

479

modreg = insn->is_opcode & 077;

sys/arch/m68k/fpe/fpu_emulate.c

493

sig = fpu_decode_ea(frame, insn, &insn->is_ea, modreg);

sys/arch/m68k/fpe/fpu_emulate.c

500

if (insn->is_ea.ea_flags & EA_PREDECR) {

sys/arch/m68k/fpe/fpu_emulate.c

512

sig = fpu_store_ea(frame, insn, &insn->is_ea,

sys/arch/m68k/fpe/fpu_emulate.c

520

sig = fpu_load_ea(frame, insn, &insn->is_ea,

sys/arch/m68k/fpe/fpu_emulate.c

598

fpu_emul_arith(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_emulate.c

615

DUMP_INSN(insn);

sys/arch/m68k/fpe/fpu_emulate.c

620

word1 = insn->is_word1;

sys/arch/m68k/fpe/fpu_emulate.c

631

DUMP_INSN(insn);

sys/arch/m68k/fpe/fpu_emulate.c

644

insn->is_datasize = 8;

sys/arch/m68k/fpe/fpu_emulate.c

646

insn->is_datasize = 4;

sys/arch/m68k/fpe/fpu_emulate.c

648

insn->is_datasize = 2;

sys/arch/m68k/fpe/fpu_emulate.c

650

insn->is_datasize = 1;

sys/arch/m68k/fpe/fpu_emulate.c

652

insn->is_datasize = 12;

sys/arch/m68k/fpe/fpu_emulate.c

660

modreg = insn->is_opcode & 077;

sys/arch/m68k/fpe/fpu_emulate.c

666

sig = fpu_decode_ea(frame, insn, &insn->is_ea, modreg);

sys/arch/m68k/fpe/fpu_emulate.c

672

if (insn->is_ea.ea_flags == EA_DIRECT &&

sys/arch/m68k/fpe/fpu_emulate.c

673

insn->is_datasize > 4) {

sys/arch/m68k/fpe/fpu_emulate.c

679

DUMP_INSN(insn);

sys/arch/m68k/fpe/fpu_emulate.c

683

flags = insn->is_ea.ea_flags;

sys/arch/m68k/fpe/fpu_emulate.c

684

regname = (insn->is_ea.ea_regnum & 8) ? 'a' : 'd';

sys/arch/m68k/fpe/fpu_emulate.c

687

printf("%c%d\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_emulate.c

690

printf("pc@(%d)\n", insn->is_ea.ea_offset);

sys/arch/m68k/fpe/fpu_emulate.c

695

printf("%c%d@-\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_emulate.c

697

printf("%c%d@+\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_emulate.c

70

#define DUMP_INSN(insn) \

sys/arch/m68k/fpe/fpu_emulate.c

700

insn->is_ea.ea_regnum & 7,

sys/arch/m68k/fpe/fpu_emulate.c

701

insn->is_ea.ea_offset);

sys/arch/m68k/fpe/fpu_emulate.c

704

insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_emulate.c

706

printf("0x%08x\n", insn->is_ea.ea_absaddr);

sys/arch/m68k/fpe/fpu_emulate.c

709

insn->is_ea.ea_immed[0],

sys/arch/m68k/fpe/fpu_emulate.c

710

insn->is_ea.ea_immed[1],

sys/arch/m68k/fpe/fpu_emulate.c

711

insn->is_ea.ea_immed[2]);

sys/arch/m68k/fpe/fpu_emulate.c

713

printf("%c%d@\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_emulate.c

717

fpu_load_ea(frame, insn, &insn->is_ea, (char*)buf);

sys/arch/m68k/fpe/fpu_emulate.c

73

(insn)->is_advance, (insn)->is_datasize, \

sys/arch/m68k/fpe/fpu_emulate.c

732

buf[0], buf[1], buf[2], insn->is_datasize));

sys/arch/m68k/fpe/fpu_emulate.c

736

DUMP_INSN(insn);

sys/arch/m68k/fpe/fpu_emulate.c

74

(insn)->is_opcode, (insn)->is_word1)

sys/arch/m68k/fpe/fpu_emulate.c

77

#define DUMP_INSN(insn) do {} while (/* CONSTCOND */ 0)

sys/arch/m68k/fpe/fpu_emulate.c

89

static struct instruction insn;

sys/arch/m68k/fpe/fpu_emulate.c

911

insn->is_opcode, insn->is_word1));

sys/arch/m68k/fpe/fpu_emulate.c

95

insn.is_datasize = -1;

sys/arch/m68k/fpe/fpu_emulate.c

950

DUMP_INSN(insn);

sys/arch/m68k/fpe/fpu_fmovecr.c

101

fpu_emul_fmovecr(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_fmovecr.c

106

dstreg = (insn->is_word1 >> 7) & 0x7;

sys/arch/m68k/fpe/fpu_fmovecr.c

107

offset = insn->is_word1 & 0x7F;

sys/arch/m68k/fpe/fpu_fscale.c

100

insn->is_datasize = 4;

sys/arch/m68k/fpe/fpu_fscale.c

102

insn->is_datasize = 2;

sys/arch/m68k/fpe/fpu_fscale.c

104

insn->is_datasize = 1;

sys/arch/m68k/fpe/fpu_fscale.c

106

insn->is_datasize = 12;

sys/arch/m68k/fpe/fpu_fscale.c

114

modreg = insn->is_opcode & 077;

sys/arch/m68k/fpe/fpu_fscale.c

120

sig = fpu_decode_ea(frame, insn, &insn->is_ea, insn->is_opcode);

sys/arch/m68k/fpe/fpu_fscale.c

128

if (insn->is_ea.ea_flags == EA_DIRECT &&

sys/arch/m68k/fpe/fpu_fscale.c

129

insn->is_datasize > 4) {

sys/arch/m68k/fpe/fpu_fscale.c

139

flags = insn->is_ea.ea_flags;

sys/arch/m68k/fpe/fpu_fscale.c

140

regname = (insn->is_ea.ea_regnum & 8) ? 'a' : 'd';

sys/arch/m68k/fpe/fpu_fscale.c

143

printf("%c%d\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_fscale.c

145

printf("%c%d@-\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_fscale.c

147

printf("%c%d@+\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_fscale.c

150

regname, insn->is_ea.ea_regnum & 7,

sys/arch/m68k/fpe/fpu_fscale.c

151

insn->is_ea.ea_offset);

sys/arch/m68k/fpe/fpu_fscale.c

154

regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_fscale.c

156

printf("0x%08x\n", insn->is_ea.ea_absaddr);

sys/arch/m68k/fpe/fpu_fscale.c

158

printf("pc@(%d)\n", insn->is_ea.ea_offset);

sys/arch/m68k/fpe/fpu_fscale.c

161

insn->is_ea.ea_immed[0],

sys/arch/m68k/fpe/fpu_fscale.c

162

insn->is_ea.ea_immed[1],

sys/arch/m68k/fpe/fpu_fscale.c

163

insn->is_ea.ea_immed[2]);

sys/arch/m68k/fpe/fpu_fscale.c

165

printf("%c%d@\n", regname, insn->is_ea.ea_regnum & 7);

sys/arch/m68k/fpe/fpu_fscale.c

168

fpu_load_ea(frame, insn, &insn->is_ea, (char*)buf);

sys/arch/m68k/fpe/fpu_fscale.c

172

buf[0], buf[1], buf[2], insn->is_datasize);

sys/arch/m68k/fpe/fpu_fscale.c

51

fpu_emul_fscale(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_fscale.c

75

word1 = insn->is_word1;

sys/arch/m68k/fpe/fpu_fscale.c

98

insn->is_datasize = 8;

sys/arch/m68k/fpe/fpu_fstore.c

100

sig = fpu_decode_ea(frame, insn, &insn->is_ea, modreg);

sys/arch/m68k/fpe/fpu_fstore.c

108

if (insn->is_datasize > 4 && insn->is_ea.ea_flags == EA_DIRECT) {

sys/arch/m68k/fpe/fpu_fstore.c

135

fpu_store_ea(frame, insn, &insn->is_ea, (char *)buf);

sys/arch/m68k/fpe/fpu_fstore.c

138

buf[0], buf[1], buf[2], insn->is_datasize);

sys/arch/m68k/fpe/fpu_fstore.c

45

fpu_emul_fstore(struct fpemu *fe, struct instruction *insn)

sys/arch/m68k/fpe/fpu_fstore.c

60

word1 = insn->is_word1;

sys/arch/m68k/fpe/fpu_fstore.c

65

insn->is_datasize = 8;

sys/arch/m68k/fpe/fpu_fstore.c

67

insn->is_datasize = 4;

sys/arch/m68k/fpe/fpu_fstore.c

69

insn->is_datasize = 2;

sys/arch/m68k/fpe/fpu_fstore.c

72

insn->is_datasize = 1;

sys/arch/m68k/fpe/fpu_fstore.c

75

insn->is_datasize = 12;

sys/arch/m68k/fpe/fpu_fstore.c

85

format, insn->is_datasize);

sys/arch/m68k/fpe/fpu_fstore.c

91

modreg = insn->is_opcode & 077;

sys/arch/mips/include/db_machdep.h

88

db_addr_t db_disasm_insn(int insn, db_addr_t loc, bool altfmt);

sys/arch/mips/include/mips_opcode.h

419

#define INSN_LUI_P(insn) (((insn) >> 26) == OP_LUI)

sys/arch/mips/include/mips_opcode.h

420

#define INSN_LW_P(insn) (((insn) >> 26) == OP_LW)

sys/arch/mips/include/mips_opcode.h

421

#define INSN_SW_P(insn) (((insn) >> 26) == OP_SW)

sys/arch/mips/include/mips_opcode.h

422

#define INSN_LD_P(insn) (((insn) >> 26) == OP_LD)

sys/arch/mips/include/mips_opcode.h

423

#define INSN_SD_P(insn) (((insn) >> 26) == OP_SD)

sys/arch/mips/include/mips_opcode.h

425

#define INSN_LOAD_P(insn) (INSN_LD_P(insn) || INSN_LW_P(insn))

sys/arch/mips/include/mips_opcode.h

426

#define INSN_STORE_P(insn) (INSN_SD_P(insn) || INSN_SW_P(insn))

sys/arch/mips/mips/db_disasm.c

249

db_disasm_insn(int insn, db_addr_t loc, bool altfmt)

sys/arch/mips/mips/db_disasm.c

254

i.word = insn;

sys/arch/mips/mips/db_disasm.c

350

(insn & __BIT(10)) ? ".hb" : "");

sys/arch/mips/mips/db_trace.c

230

int insn;

sys/arch/mips/mips/db_trace.c

244

insn = *(int *)(intptr_t)va;

sys/arch/mips/mips/db_trace.c

245

if (insn == MIPS_ERET)

sys/arch/mips/mips/db_trace.c

247

} while (insn != MIPS_JR_RA && insn != MIPS_JR_K0);

sys/arch/mips/mips/kobj_machdep.c

129

KASSERT((*insn & 0x3ffffff) == 0);

sys/arch/mips/mips/kobj_machdep.c

130

DPRINTF(" orig insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

131

*insn |= addr;

sys/arch/mips/mips/kobj_machdep.c

132

DPRINTF(" new insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

142

KASSERT((*insn & 0xffff) == 0);

sys/arch/mips/mips/kobj_machdep.c

143

DPRINTF(" orig insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

145

*insn |= RELOC_HI16(addr);

sys/arch/mips/mips/kobj_machdep.c

146

DPRINTF(" new insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

155

KASSERT((*insn & 0xffff) == 0);

sys/arch/mips/mips/kobj_machdep.c

156

DPRINTF(" orig insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

158

*insn |= RELOC_LO16(addr);

sys/arch/mips/mips/kobj_machdep.c

159

DPRINTF(" new insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

198

KASSERT((*insn & 0xffff) == 0);

sys/arch/mips/mips/kobj_machdep.c

199

DPRINTF(" orig insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

201

*insn |= RELOC_HIGHER(addr);

sys/arch/mips/mips/kobj_machdep.c

202

DPRINTF(" new insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

212

KASSERT((*insn & 0xffff) == 0);

sys/arch/mips/mips/kobj_machdep.c

213

DPRINTF(" orig insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

215

*insn |= RELOC_HIGHEST(addr);

sys/arch/mips/mips/kobj_machdep.c

216

DPRINTF(" new insn = 0x%08x\n", *insn);

sys/arch/mips/mips/kobj_machdep.c

70

uint32_t *insn;

sys/arch/mips/mips/kobj_machdep.c

94

insn = (void *)where;

sys/arch/mips/mips/mips_fixup.c

102

lui_insn = insn;

sys/arch/mips/mips/mips_fixup.c

116

&& (INSN_LOAD_P(insn) || INSN_STORE_P(insn))) {

sys/arch/mips/mips/mips_fixup.c

117

size_t base = (insn >> 21) & 31;

sys/arch/mips/mips/mips_fixup.c

119

size_t rt = (insn >> 16) & 31;

sys/arch/mips/mips/mips_fixup.c

121

int32_t load_addr = lui_offset + (int16_t)insn;

sys/arch/mips/mips/mips_fixup.c

130

insn,

sys/arch/mips/mips/mips_fixup.c

131

INSN_LOAD_P(insn)

sys/arch/mips/mips/mips_fixup.c

132

? INSN_LW_P(insn) ? "lw" : "ld"

sys/arch/mips/mips/mips_fixup.c

133

: INSN_SW_P(insn) ? "sw" : "sd",

sys/arch/mips/mips/mips_fixup.c

152

} else if (INSN_LOAD_P(insn)) {

sys/arch/mips/mips/mips_fixup.c

157

size_t rt = (insn >> 16) & 31;

sys/arch/mips/mips/mips_fixup.c

244

uint32_t insn = *insnp;

sys/arch/mips/mips/mips_fixup.c

246

KASSERT((insn >> (26+1)) == (OPCODE_J >> 1));

sys/arch/mips/mips/mips_fixup.c

247

KASSERT((insn << 6) == (jfi->jfi_stub << 6));

sys/arch/mips/mips/mips_fixup.c

249

insn ^= (jfi->jfi_stub ^ jfi->jfi_real);

sys/arch/mips/mips/mips_fixup.c

251

KASSERT((insn << 6) == (jfi->jfi_real << 6));

sys/arch/mips/mips/mips_fixup.c

258

insn, opcode == OPCODE_J ? "j" : "jal",

sys/arch/mips/mips/mips_fixup.c

264

*insnp = insn;

sys/arch/mips/mips/mips_fixup.c

317

const InstFmt insn = { .word = stubp[n] };

sys/arch/mips/mips/mips_fixup.c

318

switch (insn.IType.op) {

sys/arch/mips/mips/mips_fixup.c

320

regs[insn.IType.rt] = (int16_t)insn.IType.imm << 16;

sys/arch/mips/mips/mips_fixup.c

321

used |= (1 << insn.IType.rt);

sys/arch/mips/mips/mips_fixup.c

325

if ((used & (1 << insn.IType.rs)) == 0) {

sys/arch/mips/mips/mips_fixup.c

329

regs[insn.IType.rt] = *(const int64_t *)

sys/arch/mips/mips/mips_fixup.c

330

(regs[insn.IType.rs] + (int16_t)insn.IType.imm);

sys/arch/mips/mips/mips_fixup.c

331

used |= (1 << insn.IType.rt);

sys/arch/mips/mips/mips_fixup.c

334

if (insn.IType.rt != _R_RA || insn.IType.rs != _R_SP) {

sys/arch/mips/mips/mips_fixup.c

341

if ((used & (1 << insn.IType.rs)) == 0) {

sys/arch/mips/mips/mips_fixup.c

345

regs[insn.IType.rt] = *(const int32_t *)

sys/arch/mips/mips/mips_fixup.c

346

((intptr_t)regs[insn.IType.rs]

sys/arch/mips/mips/mips_fixup.c

347

+ (int16_t)insn.IType.imm);

sys/arch/mips/mips/mips_fixup.c

348

used |= (1 << insn.IType.rt);

sys/arch/mips/mips/mips_fixup.c

351

if (insn.IType.rt != _R_RA || insn.IType.rs != _R_SP) {

sys/arch/mips/mips/mips_fixup.c

358

if ((used & (1 << insn.IType.rs)) == 0) {

sys/arch/mips/mips/mips_fixup.c

362

regs[insn.IType.rt] |= insn.IType.imm;

sys/arch/mips/mips/mips_fixup.c

363

used |= (1 << insn.IType.rt);

sys/arch/mips/mips/mips_fixup.c

366

switch (insn.RType.rs) {

sys/arch/mips/mips/mips_fixup.c

368

if (insn.RType.rd != 22) {

sys/arch/mips/mips/mips_fixup.c

372

if ((used & (1 << insn.RType.rt)) == 0) {

sys/arch/mips/mips/mips_fixup.c

384

if (insn.JType.target << 2 != mcount_addr) {

sys/arch/mips/mips/mips_fixup.c

391

switch (insn.RType.func) {

sys/arch/mips/mips/mips_fixup.c

394

if ((used & (1 << insn.RType.rs)) == 0) {

sys/arch/mips/mips/mips_fixup.c

405

return regs[insn.RType.rs];

sys/arch/mips/mips/mips_fixup.c

407

if ((used & (1 << insn.RType.rs)) == 0

sys/arch/mips/mips/mips_fixup.c

408

|| (used & (1 << insn.RType.rt)) == 0) {

sys/arch/mips/mips/mips_fixup.c

412

regs[insn.RType.rd] =

sys/arch/mips/mips/mips_fixup.c

413

regs[insn.RType.rs] & regs[insn.RType.rt];

sys/arch/mips/mips/mips_fixup.c

414

used |= (1 << insn.RType.rd);

sys/arch/mips/mips/mips_fixup.c

419

if (regs[insn.RType.rd] != regs[insn.RType.rt]

sys/arch/mips/mips/mips_fixup.c

420

|| (used & (1 << insn.RType.rt)) == 0

sys/arch/mips/mips/mips_fixup.c

421

|| regs[insn.RType.shamt] != 0) {

sys/arch/mips/mips/mips_fixup.c

428

if (insn.RType.rd != _R_ZERO) {

sys/arch/mips/mips/mips_fixup.c

435

if (insn.RType.rt != 0) {

sys/arch/mips/mips/mips_fixup.c

439

if (insn.RType.rd != 1 ||

sys/arch/mips/mips/mips_fixup.c

440

insn.RType.rs != 31) {

sys/arch/mips/mips/mips_fixup.c

487

uint32_t insn = *insnp;

sys/arch/mips/mips/mips_fixup.c

488

uint32_t offset = insn & 0x03ffffff;

sys/arch/mips/mips/mips_fixup.c

489

uint32_t opcode = insn >> 26;

sys/arch/mips/mips/mips_fixup.c

90

const uint32_t insn = *insnp;

sys/arch/mips/mips/mips_fixup.c

91

if (INSN_LUI_P(insn)) {

sys/arch/mips/mips/mips_fixup.c

92

const int32_t offset = insn << 16;

sys/arch/mips/mips/mips_fixup.c

93

lui_reg = (insn >> 16) & 31;

sys/arch/mips/mips/mips_fixup.c

97

insn, lui_reg, offset);

sys/arch/mips/mips/trap.c

181

InstFmt insn;

sys/arch/mips/mips/trap.c

598

insn.word = instr;

sys/arch/mips/mips/trap.c

608

if ((insn.JType.op == OP_SPECIAL) &&

sys/arch/mips/mips/trap.c

609

(insn.RType.func == OP_BREAK)) {

sys/arch/mips/mips/trap.c

610

int code = (insn.RType.rs << 5) | insn.RType.rt;

sys/arch/mips/mips/trap.c

705

insn.word = instr;

sys/arch/mips/mips/trap.c

712

if ((insn.JType.op == OP_SPECIAL) &&

sys/arch/mips/mips/trap.c

713

(insn.RType.func == OP_TEQ)) {

sys/arch/mips/mips/trap.c

714

int code = (insn.RType.rd << 5) | insn.RType.shamt;

sys/arch/or1k/include/db_machdep.h

45

#define BKPT_SET(insn, addr) (BKPT_INSN)

sys/arch/or1k/include/db_machdep.h

63

inst_call(db_expr_t insn)

sys/arch/or1k/include/db_machdep.h

65

return (insn & 0xfc000000) == 0x04000000 /* l.jal */

sys/arch/or1k/include/db_machdep.h

66

|| (insn & 0xffff07ff) == 0x48000000; /* l.jalr */

sys/arch/or1k/include/db_machdep.h

70

inst_load(db_expr_t insn)

sys/arch/or1k/include/db_machdep.h

79

inst_return(db_expr_t insn)

sys/arch/or1k/include/db_machdep.h

81

return insn == 0x44004800; /* l.jr r9 */

sys/arch/or1k/include/db_machdep.h

85

inst_store(db_expr_t insn)

sys/arch/or1k/include/db_machdep.h

93

inst_trap_return(db_expr_t insn)

sys/arch/or1k/include/db_machdep.h

95

return insn == 0x24000000; /* l.rfe */

sys/arch/powerpc/booke/booke_machdep.c

564

uint32_t insn;

sys/arch/powerpc/booke/booke_machdep.c

567

if (ufetch_32((const void *)tf->tf_srr0, &insn) != 0)

sys/arch/powerpc/booke/booke_machdep.c

572

if ((insn >> 28) == 4) {

sys/arch/powerpc/booke/booke_machdep.c

574

if ((insn >> 26) == 0x12) {

sys/arch/powerpc/booke/booke_machdep.c

575

const int32_t off = (((int32_t)insn << 6) >> 6) & ~3;

sys/arch/powerpc/booke/booke_machdep.c

576

iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;

sys/arch/powerpc/booke/booke_machdep.c

578

} else if ((insn >> 26) == 0x10) {

sys/arch/powerpc/booke/booke_machdep.c

579

const int16_t off = insn & ~3;

sys/arch/powerpc/booke/booke_machdep.c

580

iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;

sys/arch/powerpc/booke/booke_machdep.c

582

} else if ((insn & 0xfc00fffe) == 0x4c000420) {

sys/arch/powerpc/booke/booke_machdep.c

585

} else if ((insn & 0xfc00fffe) == 0x4c000020) {

sys/arch/powerpc/fpu/fpu_emu.c

210

union instr insn;

sys/arch/powerpc/fpu/fpu_emu.c

223

if (copyin((void *) (tf->tf_srr0), &insn.i_int, sizeof (insn.i_int))) {

sys/arch/powerpc/fpu/fpu_emu.c

234

insn.i_int, (void *)tf->tf_srr0));

sys/arch/powerpc/fpu/fpu_emu.c

236

if ((insn.i_any.i_opcd == OPC_TWI) ||

sys/arch/powerpc/fpu/fpu_emu.c

237

((insn.i_any.i_opcd == OPC_integer_31) &&

sys/arch/powerpc/fpu/fpu_emu.c

238

(insn.i_x.i_xo == OPC31_TW))) {

sys/arch/powerpc/fpu/fpu_emu.c

246

switch (fpu_execute(tf, &fe, &insn)) {

sys/arch/powerpc/fpu/fpu_emu.c

277

insn.i_int, (void *) (tf->tf_srr0));

sys/arch/powerpc/fpu/fpu_emu.c

278

opc_disasm((vaddr_t)(tf->tf_srr0), insn.i_int);

sys/arch/powerpc/fpu/fpu_emu.c

344

fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)

sys/arch/powerpc/fpu/fpu_emu.c

347

union instr instr = *insn;

sys/arch/powerpc/powerpc/fix_unaligned.c

133

#define DISASM(tf, insn) \

sys/arch/powerpc/powerpc/fix_unaligned.c

136

opc_disasm((tf)->tf_srr0, (insn)->i_int); \

sys/arch/powerpc/powerpc/fix_unaligned.c

139

#define DISASM(tf, insn) __nothing

sys/arch/powerpc/powerpc/fix_unaligned.c

152

union instr insn;

sys/arch/powerpc/powerpc/fix_unaligned.c

157

ret = ufetch_32((uint32_t *)tf->tf_srr0, (uint32_t *)&insn.i_int);

sys/arch/powerpc/powerpc/fix_unaligned.c

169

if (emul_unaligned(tf, ksi, &insn))

sys/arch/powerpc/powerpc/fix_unaligned.c

172

CTASSERT(sizeof(insn) == 4); /* It was broken before... */

sys/arch/powerpc/powerpc/fix_unaligned.c

173

tf->tf_srr0 += sizeof(insn);

sys/arch/powerpc/powerpc/fix_unaligned.c

185

emul_unaligned(struct trapframe *tf, ksiginfo_t *ksi, const union instr *insn)

sys/arch/powerpc/powerpc/fix_unaligned.c

189

switch (insn->i_any.i_opcd) {

sys/arch/powerpc/powerpc/fix_unaligned.c

241

switch (insn->i_x.i_xo) {

sys/arch/powerpc/powerpc/fix_unaligned.c

322

if (do_lstmw(tf, insn, flags))

sys/arch/powerpc/powerpc/fix_unaligned.c

333

if (do_lstmw(tf, insn, flags))

sys/arch/powerpc/powerpc/fix_unaligned.c

346

insn->i_int, insn->i_any.i_opcd, insn->i_x.i_xo);

sys/arch/powerpc/powerpc/fix_unaligned.c

347

DISASM(tf, insn);

sys/arch/powerpc/powerpc/fix_unaligned.c

354

if (do_lst(tf, insn, flags)) {

sys/arch/powerpc/powerpc/fix_unaligned.c

377

do_lst(struct trapframe *tf, const union instr *insn, int flags)

sys/arch/powerpc/powerpc/fix_unaligned.c

389

rs = insn->i_d.i_rs; /* same as i_[dx].i_r[sd] */

sys/arch/powerpc/powerpc/fix_unaligned.c

423

ra = insn->i_d.i_ra; /* same as i_x.i_ra */

sys/arch/powerpc/powerpc/fix_unaligned.c

435

insn->i_int, insn->i_any.i_opcd, insn->i_x.i_xo);

sys/arch/powerpc/powerpc/fix_unaligned.c

436

DISASM(tf, insn);

sys/arch/powerpc/powerpc/fix_unaligned.c

448

insn->i_int, insn->i_any.i_opcd, insn->i_x.i_xo);

sys/arch/powerpc/powerpc/fix_unaligned.c

449

DISASM(tf, insn);

sys/arch/powerpc/powerpc/fix_unaligned.c

455

do_lstmw(struct trapframe *tf, const union instr *insn, int flags)

sys/arch/powerpc/powerpc/fix_unaligned.c

467

rs = insn->i_d.i_rs;

sys/arch/powerpc/powerpc/fix_unaligned.c

468

ra = insn->i_d.i_ra;

sys/arch/powerpc/powerpc/fix_unaligned.c

469

ea = (uint8_t *)(insn->i_d.i_d + (ra ? tf->tf_fixreg[ra] : 0));

sys/arch/powerpc/powerpc/fix_unaligned.c

493

insn->i_int, insn->i_any.i_opcd,

sys/arch/powerpc/powerpc/fix_unaligned.c

494

insn->i_x.i_xo);

sys/arch/powerpc/powerpc/fix_unaligned.c

495

DISASM(tf, insn);

sys/arch/powerpc/powerpc/fix_unaligned.c

516

insn->i_int, insn->i_any.i_opcd, insn->i_x.i_xo);

sys/arch/powerpc/powerpc/fix_unaligned.c

517

DISASM(tf, insn);

sys/arch/powerpc/powerpc/process_machdep.c

292

ppc_ifetch(struct lwp *l, vaddr_t va, uint32_t *insn)

sys/arch/powerpc/powerpc/process_machdep.c

297

iov.iov_base = insn;

sys/arch/powerpc/powerpc/process_machdep.c

298

iov.iov_len = sizeof(*insn);

sys/arch/powerpc/powerpc/process_machdep.c

302

uio.uio_resid = sizeof(*insn);

sys/arch/powerpc/powerpc/process_machdep.c

310

ppc_istore(struct lwp *l, vaddr_t va, uint32_t insn)

sys/arch/powerpc/powerpc/process_machdep.c

315

iov.iov_base = &insn;

sys/arch/powerpc/powerpc/process_machdep.c

316

iov.iov_len = sizeof(insn);

sys/arch/powerpc/powerpc/process_machdep.c

320

uio.uio_resid = sizeof(insn);

sys/arch/powerpc/powerpc/process_machdep.c

339

uint32_t insn;

sys/arch/powerpc/powerpc/process_machdep.c

353

if ((rv = ppc_ifetch(l, va[0], &insn)) != 0)

sys/arch/powerpc/powerpc/process_machdep.c

355

if ((insn >> 28) == 4) {

sys/arch/powerpc/powerpc/process_machdep.c

356

if ((insn >> 26) == 0x12) {

sys/arch/powerpc/powerpc/process_machdep.c

358

((int32_t)(insn << 6) >> 6) & ~3;

sys/arch/powerpc/powerpc/process_machdep.c

359

va[1] = ((insn & 2) ? 0 : va[0]) + off;

sys/arch/powerpc/powerpc/process_machdep.c

360

} else if ((insn >> 26) == 0x10) {

sys/arch/powerpc/powerpc/process_machdep.c

361

const int16_t off = (int16_t)insn & ~3;

sys/arch/powerpc/powerpc/process_machdep.c

362

va[1] = ((insn & 2) ? 0 : va[0]) + off;

sys/arch/powerpc/powerpc/process_machdep.c

363

} else if ((insn & 0xfc00fffe) == 0x4c000420)

sys/arch/powerpc/powerpc/process_machdep.c

365

else if ((insn & 0xfc00fffe) == 0x4c000020)

sys/arch/powerpc/powerpc/process_machdep.c

368

va[0] += sizeof(insn);

sys/arch/powerpc/powerpc/process_machdep.c

375

if ((rv = ppc_ifetch(l, va[i], &insn)) != 0)

sys/arch/powerpc/powerpc/process_machdep.c

377

p->p_md.md_ss_insn[i] = insn;

sys/arch/powerpc/powerpc/process_machdep.c

392

if ((rv = ppc_ifetch(l, va[i], &insn)) != 0)

sys/arch/powerpc/powerpc/process_machdep.c

394

if (insn != trap) {

sys/arch/powerpc/powerpc/process_machdep.c

396

__func__, i, insn);

sys/arch/riscv/include/insn.h

160

#define INSN_SIZE_IS_16(insn) (((insn) & 0b11) != 0b11)

sys/arch/riscv/include/insn.h

161

#define INSN_SIZE_IS_32(insn) (((insn) & 0b11100) != 0b11100)

sys/arch/riscv/include/insn.h

162

#define INSN_SIZE_IS_48(insn) (((insn) & 0b100000) != 0b100000)

sys/arch/riscv/include/insn.h

163

#define INSN_SIZE_IS_64(insn) (((insn) & 0b1000000) != 0b1000000)

sys/arch/riscv/include/insn.h

166

#define INSN_HALFWORDS(insn) \

sys/arch/riscv/include/insn.h

167

(INSN_SIZE_IS_16(insn) ? 1 : \

sys/arch/riscv/include/insn.h

168

INSN_SIZE_IS_32(insn) ? 2 : \

sys/arch/riscv/include/insn.h

169

INSN_SIZE_IS_48(insn) ? 3 : \

sys/arch/riscv/include/insn.h

170

INSN_SIZE_IS_64(insn) ? 4 : \

sys/arch/riscv/include/insn.h

173

#define INSN_SIZE(insn) (INSN_HALFWORDS(insn) * sizeof(uint16_t))

sys/arch/riscv/include/insn.h

187

#define INSN_OPCODE32(insn) (((insn) & 0x0000007f) >> 2)

sys/arch/riscv/include/insn.h

188

#define INSN_RD(insn) (((insn) & 0x00000f80) >> 7)

sys/arch/riscv/include/insn.h

189

#define INSN_FUNCT3(insn) (((insn) & 0x00007000) >> 12)

sys/arch/riscv/include/insn.h

190

#define INSN_RS1(insn) (((insn) & 0x000f8000) >> 15)

sys/arch/riscv/include/insn.h

191

#define INSN_RS2(insn) (((insn) & 0x01f00000) >> 20)

sys/arch/riscv/include/insn.h

192

#define INSN_FUNCT7(insn) (((insn) & 0xfe000000) >> 25)

sys/arch/riscv/include/insn.h

195

#define INSN_IMM_U(insn) ((insn) & 0xfffff000)

sys/arch/riscv/include/insn.h

198

#define INSN_IMM_I(insn) SIGNEXT32(((insn) & 0xfff00000) >> 20, 12)

sys/arch/riscv/include/insn.h

201

#define INSN_IMM_S_raw(insn) ((INSN_FUNCT7(insn) << 5) | INSN_RD(insn))

sys/arch/riscv/include/insn.h

202

#define INSN_IMM_S(insn) SIGNEXT32(INSN_IMM_S_raw(insn), 12)

sys/arch/riscv/include/insn.h

205

#define INSN_IMM_B_raw(insn) \

sys/arch/riscv/include/insn.h

206

(((insn & 0x80000000) >> (31-12)) | \

sys/arch/riscv/include/insn.h

207

((insn & 0x00000080) << (11-7)) | \

sys/arch/riscv/include/insn.h

208

((insn & 0x7e000000) >> (25-5)) | \

sys/arch/riscv/include/insn.h

209

((insn & 0x00000f00) >> (8-1)))

sys/arch/riscv/include/insn.h

210

#define INSN_IMM_B(insn) SIGNEXT32(INSN_IMM_B_raw(insn), 13)

sys/arch/riscv/include/insn.h

213

#define INSN_IMM_J_raw(insn) \

sys/arch/riscv/include/insn.h

214

(((insn & 0x80000000) >> (31-20)) | \

sys/arch/riscv/include/insn.h

215

((insn & 0x000ff000) >> (12-12)) | \

sys/arch/riscv/include/insn.h

216

((insn & 0x00100000) >> (20-11)) | \

sys/arch/riscv/include/insn.h

217

((insn & 0x7fe00000) >> (21-1)))

sys/arch/riscv/include/insn.h

218

#define INSN_IMM_J(insn) SIGNEXT32(INSN_IMM_J_raw(insn), 21)

sys/arch/riscv/include/insn.h

224

#define INSN16_QUADRANT(insn) ((insn) & 0b11)

sys/arch/riscv/include/insn.h

244

#define INSN16_FUNCT3(insn) (((insn) & 0xe000) >> 13)

sys/arch/riscv/include/insn.h

245

#define INSN16_FUNCT2a(insn) (((insn) & 0x0c00) >> 10)

sys/arch/riscv/include/insn.h

246

#define INSN16_FUNCT1b(insn) (((insn) & 0x1000) >> 12)

sys/arch/riscv/include/insn.h

247

#define INSN16_FUNCT2b(insn) (((insn) & 0x0060) >> 5)

sys/arch/riscv/include/insn.h

248

#define INSN16_FUNCT3c(insn) \

sys/arch/riscv/include/insn.h

249

((INSN16_FUNCT1b(insn) << 2) | INSN16_FUNCT2b(insn))

sys/arch/riscv/include/insn.h

252

#define INSN16_RS1(insn) (((insn) & 0x0f80) >> 7) /* bits 7-11 */

sys/arch/riscv/include/insn.h

253

#define INSN16_RS2(insn) (((insn) & 0x007c) >> 2) /* bits 2-6 */

sys/arch/riscv/include/insn.h

256

#define INSN16_RS1x(insn) ((((insn) & 0x0380) >> 7) + 8) /* bits 7-9 */

sys/arch/riscv/include/insn.h

257

#define INSN16_RS2x(insn) ((((insn) & 0x001c) >> 2) + 8) /* bits 2-4 */

sys/arch/riscv/include/insn.h

260

#define INSN16_IMM_CI_W(insn) \

sys/arch/riscv/include/insn.h

261

((((insn) & 0b0001000000000000) >> (12-5)) | \

sys/arch/riscv/include/insn.h

262

(((insn) & 0b0000000001110000) >> (4-2)) | \

sys/arch/riscv/include/insn.h

263

(((insn) & 0b0000000000001100) << (6-2)))

sys/arch/riscv/include/insn.h

264

#define INSN16_IMM_CI_D(insn) \

sys/arch/riscv/include/insn.h

265

((((insn) & 0b0001000000000000) >> (12-5)) | \

sys/arch/riscv/include/insn.h

266

(((insn) & 0b0000000001100000) >> (4-2)) | \

sys/arch/riscv/include/insn.h

267

(((insn) & 0b0000000000011100) << (6-2)))

sys/arch/riscv/include/insn.h

268

#define INSN16_IMM_CI_Q(insn) \

sys/arch/riscv/include/insn.h

269

((((insn) & 0b0001000000000000) >> (12-5)) | \

sys/arch/riscv/include/insn.h

270

(((insn) & 0b0000000001000000) >> (4-2)) | \

sys/arch/riscv/include/insn.h

271

(((insn) & 0b0000000000111100) << (6-2)))

sys/arch/riscv/include/insn.h

274

#define INSN16_IMM_CI_K_raw(insn) \

sys/arch/riscv/include/insn.h

275

((((insn) & 0b0001000000000000) >> (12-5)) | \

sys/arch/riscv/include/insn.h

276

(((insn) & 0b0000000001111100) >> (2-0)))

sys/arch/riscv/include/insn.h

277

#define INSN16_IMM_CI_K(insn) SIGNEXT32(INSN16_IMM_CI_K_raw(insn), 6)

sys/arch/riscv/include/insn.h

278

#define INSN16_IMM_CI_K12(insn) SIGNEXT32(INSN16_IMM_CI_K_raw(insn) << 12, 18)

sys/arch/riscv/include/insn.h

281

#define INSN16_IMM_CI_K4_raw(insn) \

sys/arch/riscv/include/insn.h

282

((((insn) & 0b0001000000000000) >> (12-9)) | \

sys/arch/riscv/include/insn.h

283

(((insn) & 0b0000000001000000) >> (6-4)) | \

sys/arch/riscv/include/insn.h

284

(((insn) & 0b0000000000100000) << (6-5)) | \

sys/arch/riscv/include/insn.h

285

(((insn) & 0b0000000000011000) << (7-3)) | \

sys/arch/riscv/include/insn.h

286

(((insn) & 0b0000000000000100) << (5-2)))

sys/arch/riscv/include/insn.h

287

#define INSN16_IMM_CI_K4(insn) SIGNEXT32(INSN16_IMM_CI_K4_raw(insn), 10)

sys/arch/riscv/include/insn.h

291

#define INSN16_IMM_CSS_W(insn) \

sys/arch/riscv/include/insn.h

292

((((insn) & 0b0001111000000000) >> (9-2)) | \

sys/arch/riscv/include/insn.h

293

(((insn) & 0b0000000110000000) >> (7-6)))

sys/arch/riscv/include/insn.h

294

#define INSN16_IMM_CSS_D(insn) \

sys/arch/riscv/include/insn.h

295

((((insn) & 0b0001110000000000) >> (9-2)) | \

sys/arch/riscv/include/insn.h

296

(((insn) & 0b0000001110000000) >> (7-6)))

sys/arch/riscv/include/insn.h

297

#define INSN16_IMM_CSS_Q(insn) \

sys/arch/riscv/include/insn.h

298

((((insn) & 0b0001100000000000) >> (9-2)) | \

sys/arch/riscv/include/insn.h

299

(((insn) & 0b0000011110000000) >> (7-6)))

sys/arch/riscv/include/insn.h

302

#define INSN16_IMM_CL_W(insn) \

sys/arch/riscv/include/insn.h

303

((((insn) & 0b0001110000000000) >> (10-3)) | \

sys/arch/riscv/include/insn.h

304

(((insn) & 0b0000000001000000) >> (6-2)) | \

sys/arch/riscv/include/insn.h

305

(((insn) & 0b0000000000100000) << (6-5)))

sys/arch/riscv/include/insn.h

306

#define INSN16_IMM_CL_D(insn) \

sys/arch/riscv/include/insn.h

307

((((insn) & 0b0001110000000000) >> (10-3)) | \

sys/arch/riscv/include/insn.h

308

(((insn) & 0b0000000001100000) << (6-5)))

sys/arch/riscv/include/insn.h

309

#define INSN16_IMM_CL_Q(insn) \

sys/arch/riscv/include/insn.h

310

((((insn) & 0b0001100000000000) >> (11-4)) | \

sys/arch/riscv/include/insn.h

311

(((insn) & 0b0000010000000000) >> (10-8)) | \

sys/arch/riscv/include/insn.h

312

(((insn) & 0b0000000001100000) << (6-5)))

sys/arch/riscv/include/insn.h

315

#define INSN16_IMM_CS_W(insn) INSN16_IMM_CL_W(insn)

sys/arch/riscv/include/insn.h

316

#define INSN16_IMM_CS_D(insn) INSN16_IMM_CL_D(insn)

sys/arch/riscv/include/insn.h

317

#define INSN16_IMM_CS_Q(insn) INSN16_IMM_CL_Q(insn)

sys/arch/riscv/include/insn.h

320

#define INSN16_IMM_CJ_raw(insn) \

sys/arch/riscv/include/insn.h

321

((((insn) & 0b0001000000000000) >> (12-11)) | \

sys/arch/riscv/include/insn.h

322

(((insn) & 0b0000100000000000) >> (11-4)) | \

sys/arch/riscv/include/insn.h

323

(((insn) & 0b0000011000000000) >> (9-8)) | \

sys/arch/riscv/include/insn.h

324

(((insn) & 0b0000000100000000) << (10-8)) | \

sys/arch/riscv/include/insn.h

325

(((insn) & 0b0000000010000000) >> (7-6)) | \

sys/arch/riscv/include/insn.h

326

(((insn) & 0b0000000001000000) << (7-6)) | \

sys/arch/riscv/include/insn.h

327

(((insn) & 0b0000000000111000) >> (3-1)) | \

sys/arch/riscv/include/insn.h

328

(((insn) & 0b0000000000000100) << (5-2)))

sys/arch/riscv/include/insn.h

329

#define INSN16_IMM_CJ(insn) SIGNEXT32(INSN16_IMM_CJ_raw(insn), 12)

sys/arch/riscv/include/insn.h

332

#define INSN16_IMM_CB_raw(insn) \

sys/arch/riscv/include/insn.h

333

((((insn) & 0b0001000000000000) >> (12-8)) | \

sys/arch/riscv/include/insn.h

334

(((insn) & 0b0000110000000000) >> (10-3)) | \

sys/arch/riscv/include/insn.h

335

(((insn) & 0b0000000001100000) << (6-5)) | \

sys/arch/riscv/include/insn.h

336

(((insn) & 0b0000000000011000) >> (3-1)) | \

sys/arch/riscv/include/insn.h

337

(((insn) & 0b0000000000000100) << (5-2)))

sys/arch/riscv/include/insn.h

338

#define INSN16_IMM_CB(insn) SIGNEXT32(INSN16_IMM_CB_raw(insn), 9)

sys/arch/riscv/include/insn.h

343

#define INSN16_IMM_CIW(insn) \

sys/arch/riscv/include/insn.h

344

((((insn) & 0b0001100000000000) >> (11-4)) | \

sys/arch/riscv/include/insn.h

345

(((insn) & 0b0000011110000000) >> (7-6)) | \

sys/arch/riscv/include/insn.h

346

(((insn) & 0b0000000001000000) >> (6-2)) | \

sys/arch/riscv/include/insn.h

347

(((insn) & 0b0000000000100000) >> (5-3)))

sys/arch/riscv/riscv/db_disasm.c

1105

db_print_riscv_insnname(uint32_t insn, const struct riscv_disasm_insn *info)

sys/arch/riscv/riscv/db_disasm.c

1111

db_printf("%s", INSN_FUNCT3(insn) == AMO_W ? ".w" : ".d");

sys/arch/riscv/riscv/db_disasm.c

1116

db_printf("%s", riscv_int_size(INSN_RS2(insn)));

sys/arch/riscv/riscv/db_disasm.c

1119

db_printf("%s", riscv_fp_size(INSN_RS2(insn)));

sys/arch/riscv/riscv/db_disasm.c

1123

db_printf("%s", riscv_fp_size(INSN_FUNCT7(insn) & 3));

sys/arch/riscv/riscv/db_disasm.c

1128

db_printf("%s", riscv_int_size(INSN_RS2(insn)));

sys/arch/riscv/riscv/db_disasm.c

1131

db_printf("%s", riscv_fp_size(INSN_RS2(insn)));

sys/arch/riscv/riscv/db_disasm.c

1141

if ((INSN_FUNCT7(insn) >> 3) == FENCE_FM_TSO) {

sys/arch/riscv/riscv/db_disasm.c

1147

INSN_FUNCT7(insn) & AMO_AQ ? ".aq" : "",

sys/arch/riscv/riscv/db_disasm.c

1148

INSN_FUNCT7(insn) & AMO_RL ? ".rl" : "");

sys/arch/riscv/riscv/db_disasm.c

1153

db_disasm_32(db_addr_t loc, uint32_t insn, bool altfmt)

sys/arch/riscv/riscv/db_disasm.c

1162

opcode = INSN_OPCODE32(insn);

sys/arch/riscv/riscv/db_disasm.c

1169

info = riscv_disasm_match(table, numtable, insn, 0);

sys/arch/riscv/riscv/db_disasm.c

1175

db_print_riscv_insnname(insn, info);

sys/arch/riscv/riscv/db_disasm.c

1180

db_print_riscv_reg(INSN_RD(insn),

sys/arch/riscv/riscv/db_disasm.c

1193

imm = INSN_IMM_I(insn);

sys/arch/riscv/riscv/db_disasm.c

1195

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1203

imm = INSN_IMM_I(insn);

sys/arch/riscv/riscv/db_disasm.c

1205

INSN_RS1(insn));

sys/arch/riscv/riscv/db_disasm.c

1211

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1221

db_print_riscv_reg(INSN_RS2(insn),

sys/arch/riscv/riscv/db_disasm.c

1246

INSN_FUNCT7(insn) & 3,

sys/arch/riscv/riscv/db_disasm.c

1247

INSN_RS2(insn));

sys/arch/riscv/riscv/db_disasm.c

1252

INSN_FUNCT7(insn) & 3,

sys/arch/riscv/riscv/db_disasm.c

1253

INSN_RS2(insn));

sys/arch/riscv/riscv/db_disasm.c

1261

db_print_riscv_fpround(sep, INSN_FUNCT3(insn));

sys/arch/riscv/riscv/db_disasm.c

1269

riscv_fp_size(INSN_FUNCT7(insn) & 3),

sys/arch/riscv/riscv/db_disasm.c

1270

INSN_RD(insn),

sys/arch/riscv/riscv/db_disasm.c

1271

INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1272

INSN_RS2(insn),

sys/arch/riscv/riscv/db_disasm.c

1273

INSN_FUNCT7(insn) >> 2);

sys/arch/riscv/riscv/db_disasm.c

1274

db_print_riscv_fpround(", ", INSN_FUNCT3(insn));

sys/arch/riscv/riscv/db_disasm.c

1279

imm = INSN_IMM_I(insn);

sys/arch/riscv/riscv/db_disasm.c

1283

info = riscv_disasm_match(table, numtable, insn, imm);

sys/arch/riscv/riscv/db_disasm.c

1295

db_print_riscv_insnname(insn, info);

sys/arch/riscv/riscv/db_disasm.c

1300

db_print_riscv_reg(INSN_RD(insn),

sys/arch/riscv/riscv/db_disasm.c

1308

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1316

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1346

if (INSN_FUNCT3(insn) != 0) {

sys/arch/riscv/riscv/db_disasm.c

135

db_disasm_16(db_addr_t loc, uint32_t insn, bool altfmt)

sys/arch/riscv/riscv/db_disasm.c

1351

riscv_registers[INSN_RD(insn)],

sys/arch/riscv/riscv/db_disasm.c

1352

riscv_registers[INSN_RS1(insn)],

sys/arch/riscv/riscv/db_disasm.c

1353

INSN_IMM_I(insn));

sys/arch/riscv/riscv/db_disasm.c

1357

imm = INSN_IMM_S(insn);

sys/arch/riscv/riscv/db_disasm.c

1361

info = riscv_disasm_match(table, numtable, insn, imm);

sys/arch/riscv/riscv/db_disasm.c

1367

db_print_riscv_insnname(insn, info);

sys/arch/riscv/riscv/db_disasm.c

1370

db_print_riscv_reg(INSN_RS2(insn),

sys/arch/riscv/riscv/db_disasm.c

1375

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1381

imm = INSN_IMM_B(insn);

sys/arch/riscv/riscv/db_disasm.c

1385

info = riscv_disasm_match(table, numtable, insn, imm);

sys/arch/riscv/riscv/db_disasm.c

1391

db_print_riscv_insnname(insn, info);

sys/arch/riscv/riscv/db_disasm.c

1394

db_print_riscv_reg(INSN_RS1(insn),

sys/arch/riscv/riscv/db_disasm.c

1398

db_print_riscv_reg(INSN_RS2(insn),

sys/arch/riscv/riscv/db_disasm.c

1408

riscv_registers[INSN_RD(insn)],

sys/arch/riscv/riscv/db_disasm.c

1409

INSN_IMM_U(insn));

sys/arch/riscv/riscv/db_disasm.c

1415

riscv_registers[INSN_RD(insn)]);

sys/arch/riscv/riscv/db_disasm.c

1416

db_print_addr(loc + (int32_t)INSN_IMM_J(insn));

sys/arch/riscv/riscv/db_disasm.c

142

switch (COMBINE(INSN16_FUNCT3(insn), INSN16_QUADRANT(insn))) {

sys/arch/riscv/riscv/db_disasm.c

1432

db_disasm_unknown(const uint16_t *insn, unsigned n)

sys/arch/riscv/riscv/db_disasm.c

1438

db_printf("%02x", insn[i]);

sys/arch/riscv/riscv/db_disasm.c

144

rd = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

1447

uint16_t insn[5];

sys/arch/riscv/riscv/db_disasm.c

145

imm = INSN16_IMM_CIW(insn);

sys/arch/riscv/riscv/db_disasm.c

1455

db_read_bytes(loc, sizeof(insn[0]), (void *)&insn[0]);

sys/arch/riscv/riscv/db_disasm.c

1456

n = INSN_HALFWORDS(insn[0]);

sys/arch/riscv/riscv/db_disasm.c

1458

db_read_bytes(loc + i * sizeof(insn[i]), sizeof(insn[i]),

sys/arch/riscv/riscv/db_disasm.c

1459

(void *)&insn[i]);

sys/arch/riscv/riscv/db_disasm.c

1464

if (db_disasm_16(loc, insn[0], altfmt) != 0) {

sys/arch/riscv/riscv/db_disasm.c

1465

db_disasm_unknown(insn, n);

sys/arch/riscv/riscv/db_disasm.c

1469

insn32 = ((uint32_t)insn[1] << 16) | insn[0];

sys/arch/riscv/riscv/db_disasm.c

1471

db_disasm_unknown(insn, n);

sys/arch/riscv/riscv/db_disasm.c

1476

db_disasm_unknown(insn, n);

sys/arch/riscv/riscv/db_disasm.c

153

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

154

rd = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

156

imm = INSN16_IMM_CL_D(insn);

sys/arch/riscv/riscv/db_disasm.c

160

imm = INSN16_IMM_CL_Q(insn);

sys/arch/riscv/riscv/db_disasm.c

166

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

167

rd = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

168

imm = INSN16_IMM_CL_W(insn);

sys/arch/riscv/riscv/db_disasm.c

173

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

174

rd = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

176

imm = INSN16_IMM_CL_W(insn);

sys/arch/riscv/riscv/db_disasm.c

180

imm = INSN16_IMM_CL_D(insn);

sys/arch/riscv/riscv/db_disasm.c

186

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

187

rs2 = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

189

imm = INSN16_IMM_CS_D(insn);

sys/arch/riscv/riscv/db_disasm.c

193

imm = INSN16_IMM_CS_Q(insn);

sys/arch/riscv/riscv/db_disasm.c

199

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

200

rs2 = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

201

imm = INSN16_IMM_CS_W(insn);

sys/arch/riscv/riscv/db_disasm.c

206

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

207

rs2 = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

209

imm = INSN16_IMM_CS_W(insn);

sys/arch/riscv/riscv/db_disasm.c

213

imm = INSN16_IMM_CS_D(insn);

sys/arch/riscv/riscv/db_disasm.c

219

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

220

imm = INSN16_IMM_CI_K(insn);

sys/arch/riscv/riscv/db_disasm.c

238

imm = INSN16_IMM_CJ(insn);

sys/arch/riscv/riscv/db_disasm.c

243

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

244

imm = INSN16_IMM_CI_K(insn);

sys/arch/riscv/riscv/db_disasm.c

250

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

251

imm = INSN16_IMM_CI_K(insn);

sys/arch/riscv/riscv/db_disasm.c

256

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

258

imm = INSN16_IMM_CI_K4(insn);

sys/arch/riscv/riscv/db_disasm.c

263

imm = INSN16_IMM_CI_K12(insn);

sys/arch/riscv/riscv/db_disasm.c

269

imm = INSN16_IMM_CI_K(insn);

sys/arch/riscv/riscv/db_disasm.c

270

rd = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

271

switch (INSN16_FUNCT2a(insn)) {

sys/arch/riscv/riscv/db_disasm.c

291

INSN16_FUNCT2a(insn) == Q1MISC_SRLI ?

sys/arch/riscv/riscv/db_disasm.c

300

rs2 = INSN16_RS2x(insn);

sys/arch/riscv/riscv/db_disasm.c

301

switch (INSN16_FUNCT3c(insn)) {

sys/arch/riscv/riscv/db_disasm.c

329

imm = INSN16_IMM_CJ(insn);

sys/arch/riscv/riscv/db_disasm.c

335

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

336

imm = INSN16_IMM_CB(insn);

sys/arch/riscv/riscv/db_disasm.c

342

rs1 = INSN16_RS1x(insn);

sys/arch/riscv/riscv/db_disasm.c

343

imm = INSN16_IMM_CB(insn);

sys/arch/riscv/riscv/db_disasm.c

349

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

350

imm = INSN16_IMM_CI_K(insn);

sys/arch/riscv/riscv/db_disasm.c

376

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

378

imm = INSN16_IMM_CI_D(insn);

sys/arch/riscv/riscv/db_disasm.c

385

imm = INSN16_IMM_CI_Q(insn);

sys/arch/riscv/riscv/db_disasm.c

390

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

395

imm = INSN16_IMM_CI_W(insn);

sys/arch/riscv/riscv/db_disasm.c

399

rd = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

401

imm = INSN16_IMM_CI_W(insn);

sys/arch/riscv/riscv/db_disasm.c

408

imm = INSN16_IMM_CI_D(insn);

sys/arch/riscv/riscv/db_disasm.c

413

rs1 = INSN16_RS1(insn);

sys/arch/riscv/riscv/db_disasm.c

414

rs2 = INSN16_RS2(insn);

sys/arch/riscv/riscv/db_disasm.c

415

switch (INSN16_FUNCT1b(insn)) {

sys/arch/riscv/riscv/db_disasm.c

444

rs2 = INSN16_RS2(insn);

sys/arch/riscv/riscv/db_disasm.c

446

imm = INSN16_IMM_CSS_D(insn);

sys/arch/riscv/riscv/db_disasm.c

449

imm = INSN16_IMM_CSS_Q(insn);

sys/arch/riscv/riscv/db_disasm.c

454

rs2 = INSN16_RS2(insn);

sys/arch/riscv/riscv/db_disasm.c

455

imm = INSN16_IMM_CSS_W(insn);

sys/arch/riscv/riscv/db_disasm.c

459

rs2 = INSN16_RS2(insn);

sys/arch/riscv/riscv/db_disasm.c

461

imm = INSN16_IMM_CSS_W(insn);

sys/arch/riscv/riscv/db_disasm.c

464

imm = INSN16_IMM_CSS_D(insn);

sys/arch/riscv/riscv/db_disasm.c

831

uint32_t insn, uint32_t imm)

sys/arch/riscv/riscv/db_disasm.c

836

f3 = INSN_FUNCT3(insn);

sys/arch/riscv/riscv/db_disasm.c

837

f7 = INSN_FUNCT7(insn);

sys/arch/riscv/riscv/db_disasm.c

866

if (info->rs2 != INSN_RS2(insn)) {

sys/arch/riscv/riscv/db_disasm.c

873

if (INSN_RD(insn) != 0) {

sys/arch/riscv/riscv/db_disasm.c

878

if (INSN_RS1(insn) != 0) {

sys/arch/riscv/riscv/db_disasm.c

885

if (INSN_RS2(insn) != 0) {

sys/arch/riscv/riscv/db_disasm.c

930

switch (INSN_RS2(insn)) {

sys/arch/riscv/riscv/db_disasm.c

942

switch (INSN_RS2(insn)) {

sys/arch/riscv/riscv/db_machdep.c

126

inst_branch(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

128

return OPCODE_P(insn, BRANCH);

sys/arch/riscv/riscv/db_machdep.c

133

inst_call(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

135

const union riscv_insn ri = { .val = insn };

sys/arch/riscv/riscv/db_machdep.c

136

return (OPCODE_P(insn, JAL) && ri.type_u.u_rd == 1)

sys/arch/riscv/riscv/db_machdep.c

137

|| (OPCODE_P(insn, JALR) && ri.type_i.i_rd == 1);

sys/arch/riscv/riscv/db_machdep.c

142

inst_unconditional_flow_transfer(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

145

return OPCODE_P(insn, JAL) || OPCODE_P(insn, JALR);

sys/arch/riscv/riscv/db_machdep.c

149

inst_return(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

151

const union riscv_insn ri = { .val = insn };

sys/arch/riscv/riscv/db_machdep.c

152

return OPCODE_P(insn, JALR) && ri.type_i.i_rs1 == 1;

sys/arch/riscv/riscv/db_machdep.c

156

inst_load(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

158

return OPCODE_P(insn, LOAD) || OPCODE_P(insn, LOADFP);

sys/arch/riscv/riscv/db_machdep.c

162

inst_store(uint32_t insn)

sys/arch/riscv/riscv/db_machdep.c

164

return OPCODE_P(insn, STORE) || OPCODE_P(insn, STOREFP);

sys/arch/riscv/riscv/db_machdep.c

174

branch_taken(uint32_t insn, db_addr_t pc, db_regs_t *tf)

sys/arch/riscv/riscv/db_machdep.c

176

const union riscv_insn i = { .val = insn };

sys/arch/riscv/riscv/db_machdep.c

179

if (OPCODE_P(insn, JALR)) {

sys/arch/riscv/riscv/db_machdep.c

182

if (OPCODE_P(insn, JAL)) {

sys/arch/sh3/sh3/db_disasm.c

1015

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1018

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1019

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1039

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1042

rm = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1043

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

1044

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1080

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1083

rm = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1084

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1104

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1107

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1108

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1115

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1118

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1119

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1126

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1129

rm = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1130

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

1131

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1175

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1178

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1179

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1186

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1189

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1190

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1191

disp = (insn & 0x000f);

sys/arch/sh3/sh3/db_disasm.c

1200

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1203

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1204

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1205

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1229

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1232

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1233

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1234

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1258

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1261

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1262

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1263

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1287

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1290

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1291

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1292

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1316

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1319

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1320

imm = (int) ((char) (insn & 0x00ff));

sys/arch/sh3/sh3/db_disasm.c

1328

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1331

type = (insn & 0x0c00) >> 10;

sys/arch/sh3/sh3/db_disasm.c

1332

md = (insn & 0x0300) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1336

rn = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1337

disp = (insn & 0x000f);

sys/arch/sh3/sh3/db_disasm.c

1352

rn = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1353

disp = (insn & 0x000f);

sys/arch/sh3/sh3/db_disasm.c

1368

disp = (insn & 0x00ff);

sys/arch/sh3/sh3/db_disasm.c

1390

disp = (int) ((char) (insn & 0x00ff));

sys/arch/sh3/sh3/db_disasm.c

1409

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1412

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1413

disp = (insn & 0x00ff);

sys/arch/sh3/sh3/db_disasm.c

1422

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1425

disp = (insn & 0x0fff);

sys/arch/sh3/sh3/db_disasm.c

1436

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1439

disp = (insn & 0x0fff);

sys/arch/sh3/sh3/db_disasm.c

1450

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1453

type = (insn & 0x0c00) >> 10;

sys/arch/sh3/sh3/db_disasm.c

1454

md = (insn & 0x0300) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1455

imm = (insn & 0x00ff);

sys/arch/sh3/sh3/db_disasm.c

153

uint16_t insn;

sys/arch/sh3/sh3/db_disasm.c

1549

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1552

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1553

disp = (insn & 0x00ff);

sys/arch/sh3/sh3/db_disasm.c

1562

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1565

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1566

imm = (int) ((char) (insn & 0x00ff));

sys/arch/sh3/sh3/db_disasm.c

1574

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1577

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1578

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1579

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1603

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1606

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1607

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1608

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

163

if (ufetch_16(pc, &insn))

sys/arch/sh3/sh3/db_disasm.c

1632

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1635

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1636

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

1637

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

1661

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1664

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1665

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

167

retval = kcopy(pc, &insn, sizeof(insn));

sys/arch/sh3/sh3/db_disasm.c

1673

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1676

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1677

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

1678

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

172

return insn;

sys/arch/sh3/sh3/db_disasm.c

1731

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

1734

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

1735

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

178

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

183

n0 = (insn & 0xf000) >> 12;

sys/arch/sh3/sh3/db_disasm.c

184

n3 = (insn & 0x000f);

sys/arch/sh3/sh3/db_disasm.c

194

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

197

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

198

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

199

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

244

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

247

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

248

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

249

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

278

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

281

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

282

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

283

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

307

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

310

n1 = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

311

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

312

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

355

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

358

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

359

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

383

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

386

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

387

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

388

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

424

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

427

n1 = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

431

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

450

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

453

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

454

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

455

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

479

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

482

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

483

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

484

disp = (insn & 0x000f);

sys/arch/sh3/sh3/db_disasm.c

493

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

496

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

497

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

498

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

519

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

522

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

523

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

524

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

548

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

551

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

552

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

553

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

578

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

581

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

582

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

583

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

607

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

610

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

611

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

612

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

633

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

636

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

637

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

638

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

662

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

665

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

666

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

667

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

688

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

691

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

692

rm = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

693

md = (insn & 0x0003);

sys/arch/sh3/sh3/db_disasm.c

718

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

721

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

722

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

742

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

745

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

746

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

767

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

770

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

771

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

772

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

808

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

811

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

812

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

813

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

857

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

860

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

861

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

877

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

880

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

881

fx = (insn & 0x00f0) >> 4;

sys/arch/sh3/sh3/db_disasm.c

901

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

904

rm = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

905

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

906

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

942

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

945

rm = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

946

type = (insn & 0x00c0) >> 6;

sys/arch/sh3/sh3/db_disasm.c

947

md = (insn & 0x0030) >> 4;

sys/arch/sh3/sh3/db_disasm.c

991

uint16_t insn = get_insn(pc);

sys/arch/sh3/sh3/db_disasm.c

994

rn = (insn & 0x0f00) >> 8;

sys/arch/sh3/sh3/db_disasm.c

995

fx = (insn & 0x00f0) >> 4;

sys/arch/sparc/sparc/db_disasm.c

1002

val = SIGNEX(insn, 11);

sys/arch/sparc/sparc/db_disasm.c

1006

val = (((insn>>20)&0x3)<<13)|(insn & 0x1fff);

sys/arch/sparc/sparc/db_disasm.c

1012

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 22))),

sys/arch/sparc/sparc/db_disasm.c

1016

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 19))),

sys/arch/sparc/sparc/db_disasm.c

1020

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 30))),

sys/arch/sparc/sparc/db_disasm.c

1027

db_printf("0x%-2.2x", ((insn >> 5) & 0xff));

sys/arch/sparc/sparc/db_disasm.c

1030

db_printf("%%fcc%d", ((insn >> 25) & 0x3));

sys/arch/sparc/sparc/db_disasm.c

1035

regs[((insn >> 14) & 0x1f)],

sys/arch/sparc/sparc/db_disasm.c

1036

regs[(insn & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

1038

db_printf(" %d", ((insn >> 5) & 0xff));

sys/arch/sparc/sparc/db_disasm.c

1042

val = SIGNEX(insn, 13);

sys/arch/sparc/sparc/db_disasm.c

1044

regs[((insn >> 14) & 0x1f)],

sys/arch/sparc/sparc/db_disasm.c

1058

((insn & 0xf) | ((insn >> 4) & 0x7)));

sys/arch/sparc/sparc/db_disasm.c

1061

db_printf("%%%s", ccodes[((insn >> 11) & 0x3) + 4]);

sys/arch/sparc/sparc/db_disasm.c

1064

db_printf("%%%s", ccodes[((insn >> 11) & 0x7)]);

sys/arch/sparc/sparc/db_disasm.c

1067

db_printf("#%s", prefetch[((insn >> 25) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

1070

db_printf("%%%s", priv_regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

1073

db_printf("%%%s", state_regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

1076

db_printf("%%hi(0x%x)", ((insn & 0x3fffff) << 10));

sys/arch/sparc/sparc/db_disasm.c

1079

db_printf("0x%x", (insn & 0x1f));

sys/arch/sparc/sparc/db_disasm.c

1082

db_printf("%d", (insn & 0x3f));

sys/arch/sparc/sparc/db_disasm.c

1085

db_printf("%d", (insn & 0x3f));

sys/arch/sparc/sparc/db_disasm.c

1088

db_printf("%%%s", priv_regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

1091

db_printf("%%%s", state_regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

883

unsigned int insn, you_lose, bitmask;

sys/arch/sparc/sparc/db_disasm.c

889

insn = db_get_value(loc, 4, 0);

sys/arch/sparc/sparc/db_disasm.c

891

if (insn == 0x01000000) {

sys/arch/sparc/sparc/db_disasm.c

937

if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {

sys/arch/sparc/sparc/db_disasm.c

958

if (insn & A(1))

sys/arch/sparc/sparc/db_disasm.c

962

if (insn & P(1))

sys/arch/sparc/sparc/db_disasm.c

978

db_printf("%%%s", regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

981

db_printf("%%%s", regs[(insn & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

984

db_printf("%%%s", regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc/sparc/db_disasm.c

987

db_printf("%%f%d", ((insn >> 14) & 0x1f));

sys/arch/sparc/sparc/db_disasm.c

990

db_printf("%%f%d", (insn & 0x1f));

sys/arch/sparc/sparc/db_disasm.c

993

db_printf("%%f%d", ((insn >> 25) & 0x1f));

sys/arch/sparc/sparc/db_disasm.c

997

val = SIGNEX(insn, 13);

sys/arch/sparc/sparc/db_interface.c

478

union instr insn;

sys/arch/sparc/sparc/db_interface.c

481

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

487

if (insn.i_any.i_op != IOP_OP2 || insn.i_branch.i_annul != 1)

sys/arch/sparc/sparc/db_interface.c

490

switch (insn.i_op2.i_op2) {

sys/arch/sparc/sparc/db_interface.c

497

switch (insn.i_branch.i_cond)

sys/arch/sparc/sparc/db_interface.c

524

union instr insn;

sys/arch/sparc/sparc/db_interface.c

526

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

528

if (insn.i_any.i_op != IOP_OP2)

sys/arch/sparc/sparc/db_interface.c

531

switch (insn.i_op2.i_op2) {

sys/arch/sparc/sparc/db_interface.c

549

union instr insn;

sys/arch/sparc/sparc/db_interface.c

551

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

553

switch (insn.i_any.i_op) {

sys/arch/sparc/sparc/db_interface.c

558

return (insn.i_op3.i_op3 == IOP3_JMPL) && !db_inst_return(inst);

sys/arch/sparc/sparc/db_interface.c

569

union instr insn;

sys/arch/sparc/sparc/db_interface.c

571

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

576

if (insn.i_any.i_op != IOP_OP2)

sys/arch/sparc/sparc/db_interface.c

579

switch (insn.i_op2.i_op2)

sys/arch/sparc/sparc/db_interface.c

586

return insn.i_branch.i_cond == Icc_A;

sys/arch/sparc/sparc/db_interface.c

605

union instr insn;

sys/arch/sparc/sparc/db_interface.c

607

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

609

return (insn.i_any.i_op == IOP_reg &&

sys/arch/sparc/sparc/db_interface.c

610

insn.i_op3.i_op3 == IOP3_RETT);

sys/arch/sparc/sparc/db_interface.c

617

union instr insn;

sys/arch/sparc/sparc/db_interface.c

619

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

621

if (insn.i_any.i_op != IOP_mem)

sys/arch/sparc/sparc/db_interface.c

624

switch (insn.i_op3.i_op3) {

sys/arch/sparc/sparc/db_interface.c

657

union instr insn;

sys/arch/sparc/sparc/db_interface.c

659

insn.i_int = inst;

sys/arch/sparc/sparc/db_interface.c

661

if (insn.i_any.i_op != IOP_mem)

sys/arch/sparc/sparc/db_interface.c

664

switch (insn.i_op3.i_op3) {

sys/arch/sparc/sparc/trap.c

819

u_int insn;

sys/arch/sparc/sparc/trap.c

820

if (ufetch_int((void *)pc, &insn) == 0 &&

sys/arch/sparc/sparc/trap.c

821

(insn & 0xc1680000) == 0xc0680000) {

sys/arch/sparc64/sparc64/db_disasm.c

1002

val = SIGNEX(insn, 13);

sys/arch/sparc64/sparc64/db_disasm.c

1007

val = SIGNEX(insn, 11);

sys/arch/sparc64/sparc64/db_disasm.c

1011

val = (((insn>>20)&0x3)<<13)|(insn & 0x1fff);

sys/arch/sparc64/sparc64/db_disasm.c

1017

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 22))),

sys/arch/sparc64/sparc64/db_disasm.c

1021

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 19))),

sys/arch/sparc64/sparc64/db_disasm.c

1025

db_printsym((db_addr_t)(loc + (4 * SIGNEX(insn, 30))),

sys/arch/sparc64/sparc64/db_disasm.c

1032

db_printf("0x%-2.2x", ((insn >> 5) & 0xff));

sys/arch/sparc64/sparc64/db_disasm.c

1035

db_printf("%%fcc%d", ((insn >> 25) & 0x3));

sys/arch/sparc64/sparc64/db_disasm.c

1040

regs[((insn >> 14) & 0x1f)],

sys/arch/sparc64/sparc64/db_disasm.c

1041

regs[(insn & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

1043

db_printf(" %d", ((insn >> 5) & 0xff));

sys/arch/sparc64/sparc64/db_disasm.c

1047

val = SIGNEX(insn, 13);

sys/arch/sparc64/sparc64/db_disasm.c

1049

regs[((insn >> 14) & 0x1f)],

sys/arch/sparc64/sparc64/db_disasm.c

1063

((insn & 0xf) | ((insn >> 4) & 0x7)));

sys/arch/sparc64/sparc64/db_disasm.c

1066

db_printf("%%%s", ccodes[((insn >> 11) & 0x3) + 4]);

sys/arch/sparc64/sparc64/db_disasm.c

1069

db_printf("%%%s", ccodes[((insn >> 11) & 0x7)]);

sys/arch/sparc64/sparc64/db_disasm.c

1072

db_printf("#%s", prefetch[((insn >> 25) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

1075

db_printf("%%%s", priv_regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

1078

db_printf("%%%s", state_regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

1081

db_printf("%%hi(0x%x)", ((insn & 0x3fffff) << 10));

sys/arch/sparc64/sparc64/db_disasm.c

1084

db_printf("0x%x", (insn & 0x1f));

sys/arch/sparc64/sparc64/db_disasm.c

1087

db_printf("%d", (insn & 0x3f));

sys/arch/sparc64/sparc64/db_disasm.c

1090

db_printf("%d", (insn & 0x3f));

sys/arch/sparc64/sparc64/db_disasm.c

1093

db_printf("%%%s", priv_regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

1096

db_printf("%%%s", state_regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

888

unsigned int insn, you_lose, bitmask;

sys/arch/sparc64/sparc64/db_disasm.c

894

insn = db_get_value(loc, 4, 0);

sys/arch/sparc64/sparc64/db_disasm.c

896

if (insn == 0x01000000) {

sys/arch/sparc64/sparc64/db_disasm.c

942

if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {

sys/arch/sparc64/sparc64/db_disasm.c

963

if (insn & A(1))

sys/arch/sparc64/sparc64/db_disasm.c

967

if (insn & P(1))

sys/arch/sparc64/sparc64/db_disasm.c

983

db_printf("%%%s", regs[((insn >> 14) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

986

db_printf("%%%s", regs[(insn & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

989

db_printf("%%%s", regs[((insn >> 25) & 0x1f)]);

sys/arch/sparc64/sparc64/db_disasm.c

992

db_printf("%%f%d", ((insn >> 14) & 0x1f));

sys/arch/sparc64/sparc64/db_disasm.c

995

db_printf("%%f%d", (insn & 0x1f));

sys/arch/sparc64/sparc64/db_disasm.c

998

db_printf("%%f%d", ((insn >> 25) & 0x1f));

sys/arch/sparc64/sparc64/db_interface.c

1153

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1158

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1164

if (insn.i_any.i_op != IOP_OP2 || insn.i_branch.i_annul != 1)

sys/arch/sparc64/sparc64/db_interface.c

1167

switch (insn.i_op2.i_op2) {

sys/arch/sparc64/sparc64/db_interface.c

1174

switch (insn.i_branch.i_cond)

sys/arch/sparc64/sparc64/db_interface.c

1197

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1199

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1201

if (insn.i_any.i_op != IOP_OP2)

sys/arch/sparc64/sparc64/db_interface.c

1204

switch (insn.i_op2.i_op2) {

sys/arch/sparc64/sparc64/db_interface.c

1222

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1224

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1226

switch (insn.i_any.i_op) {

sys/arch/sparc64/sparc64/db_interface.c

1231

return (insn.i_op3.i_op3 == IOP3_JMPL) && !db_inst_return(inst);

sys/arch/sparc64/sparc64/db_interface.c

1242

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1244

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1249

if (insn.i_any.i_op != IOP_OP2)

sys/arch/sparc64/sparc64/db_interface.c

1252

switch (insn.i_op2.i_op2)

sys/arch/sparc64/sparc64/db_interface.c

1259

return insn.i_branch.i_cond == Icc_A;

sys/arch/sparc64/sparc64/db_interface.c

1277

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1279

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1281

return (insn.i_any.i_op == IOP_reg &&

sys/arch/sparc64/sparc64/db_interface.c

1282

insn.i_op3.i_op3 == IOP3_RETT);

sys/arch/sparc64/sparc64/db_interface.c

1289

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1291

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1293

if (insn.i_any.i_op != IOP_mem)

sys/arch/sparc64/sparc64/db_interface.c

1296

switch (insn.i_op3.i_op3) {

sys/arch/sparc64/sparc64/db_interface.c

1329

union instr insn;

sys/arch/sparc64/sparc64/db_interface.c

1331

insn.i_int = inst;

sys/arch/sparc64/sparc64/db_interface.c

1333

if (insn.i_any.i_op != IOP_mem)

sys/arch/sparc64/sparc64/db_interface.c

1336

switch (insn.i_op3.i_op3) {

sys/arch/usermode/modules/syscallemu/syscallemu_arm.c

50

arm_syscall_emu(struct trapframe *frame, struct lwp *l, uint32_t insn)

sys/arch/usermode/modules/syscallemu/syscallemu_arm.c

90

md_syscall(frame, l, insn);

sys/dev/nvmm/x86/nvmm_x86.h

102

struct nvmm_x86_exit_insn insn;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1115

exit->u.insn.npc = vmcb->ctrl.nrip;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1546

exit->u.insn.npc = rip + inslen;

sys/dev/pci/veritefb.c

1830

veritefb_risc_forcestep(struct veritefb_softc *sc, uint32_t insn)

sys/dev/pci/veritefb.c

1840

vfb_write4(sc, VFB_STATEDATA, insn);

sys/dev/pci/veritefb.c

1841

vfb_pacepoll4(sc, VFB_STATEDATA, insn, 0xffffffff);

sys/dev/pci/veritefb.c

1896

uint32_t data, insn;

sys/dev/pci/veritefb.c

1905

insn = VRISC_INT(VRISC_ADD_OP, 0, 0, idx);

sys/dev/pci/veritefb.c

1906

vfb_write4(sc, VFB_STATEDATA, insn);

sys/dev/pci/veritefb.c

1909

vfb_pacepoll4(sc, VFB_STATEDATA, insn, 0xffffffff);

usr.sbin/npf/npfctl/npf_bpf_comp.c

201

struct bpf_insn *insn = &bp->bf_insns[i];

usr.sbin/npf/npfctl/npf_bpf_comp.c

209

if (BPF_CLASS(insn->code) != BPF_JMP) {

usr.sbin/npf/npfctl/npf_bpf_comp.c

212

if (BPF_OP(insn->code) == BPF_JA) {

usr.sbin/npf/npfctl/npf_bpf_comp.c

219

if (insn->k == JUMP_MAGIC) {

usr.sbin/npf/npfctl/npf_bpf_comp.c

220

insn->k = swap ? 0 : fail_off;

usr.sbin/npf/npfctl/npf_bpf_comp.c

229

if (insn->jt == JUMP_MAGIC) {

usr.sbin/npf/npfctl/npf_bpf_comp.c

230

insn->jt = fail_off;

usr.sbin/npf/npfctl/npf_bpf_comp.c

233

if (insn->jf == JUMP_MAGIC) {

usr.sbin/npf/npfctl/npf_bpf_comp.c

234

insn->jf = fail_off;

usr.sbin/npf/npfctl/npf_bpf_comp.c

239

uint8_t jt = insn->jt;

usr.sbin/npf/npfctl/npf_bpf_comp.c

240

insn->jt = insn->jf;

usr.sbin/npf/npfctl/npf_bpf_comp.c

241

insn->jf = jt;