in32
as = in32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS) & 0x80;
as = in32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS) & 0x80;
return in32(R4030_SYS_ISA_VECTOR) & (ICU_LEN - 1);
return in32(RD94_SYS_INTSTAT2) & (ICU_LEN - 1);
(void)in32(RD94_SYS_INTSTAT3);
if (in32(RD94_V_LOCAL_IO_BASE + 0x560) != 0)
data = in32(RD94_SYS_PCI_CONFDATA);
mask = in32(RD94_SYS_PCI_INTMASK);
mask = in32(RD94_SYS_PCI_INTMASK);
vector = in32(RD94_SYS_INTSTAT2) & 0xffff;
stat = in32(RD94_SYS_PCI_INTSTAT);
stat &= in32(RD94_SYS_PCI_INTMASK);
for (val = in32(HW_GPIOB_OUT); ; val ^= __BIT(GPIO_SLOT_LED)) {
val = in32(HW_GPIOB_OUT);
#define RD4(reg) in32(reg)
out32(HW_RESETS, in32(HW_RESETS) | RSTB_DSP);
out32(HW_GPIOB_OUT, in32(HW_GPIOB_OUT) & ~__BIT(GPIO_DI_SPIN));
out32(HW_GPIOB_OUT, in32(HW_GPIOB_OUT) | __BIT(GPIO_DI_SPIN));
val = in32(HW_RESETS);
out32(USB_CHICKENBITS, in32(USB_CHICKENBITS) | EHCI_INTR_ENABLE);
#define RD4(reg) in32(EXI_BASE + (reg))
out32(USB_CHICKENBITS, in32(USB_CHICKENBITS) | OHCI_INTR_ENABLE);
pressed = (in32(PI_INTERRUPT_CAUSE) & RESET_SWITCH_STATE) == 0;
if ((in32(PI_INTERRUPT_CAUSE) & RESET_SWITCH_STATE) == 0) {
out32(HW_RESETS, in32(HW_RESETS) & ~RSTBINB);
in32(LT_GPUINDDATA);
return in32(LT_GPUINDDATA);
val = in32(LT_CHIPREVID);
wiiu_native = (in32(LT_PIMCOMPAT) & PPC_COMPAT) == 0;
mem2_start = in32(GLOBAL_MEM2_AVAIL_START) & ~0x80000000;
mem2_end = in32(GLOBAL_MEM2_AVAIL_END) & ~0x80000000;
out32(HW_AIPPROT, in32(HW_AIPPROT) | ENAHBIOPI);
out32(HW_GPIO_OWNER, in32(HW_GPIO_OWNER) | __BIT(GPIO_SHUTDOWN));
out32(HW_GPIO_OWNER, in32(HW_GPIO_OWNER) | __BIT(GPIO_DI_SPIN));
out32(HW_COMPAT, in32(HW_COMPAT) & ~DVDVIDEO);
if ((in32(HW_IPCPPCCTRL) & HW_IPCPPCCTRL_X1) == 0) {
out32(HW_GPIOB_OUT, in32(HW_GPIOB_OUT) | __BIT(GPIO_SHUTDOWN));
out32(HW_RESETS, in32(HW_RESETS) & ~RSTBINB);
if ((in32(HW_GPIOB_IN) & __BIT(WIIU_GPIO_POWER)) != 0) {
if ((in32(PI_INTERRUPT_CAUSE) & RESET_SWITCH_STATE) == 0) {
#define RD4(reg) in32(reg)
if ((in32(PI_INTERRUPT_CAUSE) & RESET_SWITCH_STATE) == 0) {
out32(HW_RESETS, in32(HW_RESETS) & ~RSTBINB);
value = in32(EXI_DATA(gecko_chan));
if ((in32(EXI_CR(gecko_chan)) & EXI_CR_TSTART) != 0) {
if ((in32(EXI_CR(gecko_chan)) & EXI_CR_TSTART) == 0) {
value = in32(EXI_DATA(gecko_chan)) >> 16;
out32(HW_GPIOB_OUT, in32(HW_GPIOB_OUT) | __BIT(pin));
out32(HW_GPIOB_OUT, in32(HW_GPIOB_OUT) & ~__BIT(pin));
return (in32(HW_GPIOB_IN) >> pin) & 1;
out32(HW_GPIO_INTLVL, in32(HW_GPIO_INTLVL) | __BIT(pin));
out32(HW_GPIO_INTLVL, in32(HW_GPIO_INTLVL) & ~__BIT(pin));
return (in32(HW_GPIO_INTFLAG) >> pin) & 1;
(in32(HW_IPC_PPCMSG) & ~HW_IPC_PPCMSG_INDEX_IN_MASK) |
out32(HW_IPC_PPCCTRL, in32(HW_IPC_PPCCTRL) | HW_IPC_PPCCTRL_OUT);
while (__SHIFTOUT(in32(HW_IPC_ARMMSG), HW_IPC_ARMMSG_INDEX_OUT_MASK) ==
printf("HW_IPC_PPCMSG: 0x%x\n", in32(HW_IPC_PPCMSG));
printf("HW_IPC_ARMMSG: 0x%x\n", in32(HW_IPC_ARMMSG));
(in32(HW_IPC_PPCMSG) & ~HW_IPC_PPCMSG_INDEX_OUT_MASK) |
pa = in32(MINIIPC_INFO_PTR);
index_in = __SHIFTOUT(in32(HW_IPC_PPCMSG), HW_IPC_PPCMSG_INDEX_IN_MASK);
index_out = __SHIFTOUT(in32(HW_IPC_PPCMSG), HW_IPC_PPCMSG_INDEX_OUT_MASK);
val = in32(HW_TIMER);
val = in32(HW_TIMER);
return in32(sc->sc_reg + PLATINUM_REG_OFFSET_ADDR(reg));
in32(HH_INTR_PRIMARY);
in32(HH_INTR_PRIMARY);
tmp = in32(unin_reg + 0xe0);
return in32(addr);