sys/arch/powerpc/booke/dev/pq3etsec.c

1051

if (etsec_read(sc, MACCFG1) & (MACCFG1_TX_EN | MACCFG1_RX_EN)) {

sys/arch/powerpc/booke/dev/pq3etsec.c

1058

uint32_t ievent = etsec_read(sc, IEVENT);

sys/arch/powerpc/booke/dev/pq3etsec.c

1068

ievent = etsec_read(sc, IEVENT);

sys/arch/powerpc/booke/dev/pq3etsec.c

1085

uint32_t tbipa = etsec_read(sc, TBIPA);

sys/arch/powerpc/booke/dev/pq3etsec.c

1090

uint32_t miimcfg = etsec_read(sc, MIIMCFG);

sys/arch/powerpc/booke/dev/pq3etsec.c

1174

i, IGADDR(i), etsec_read(sc, IGADDR(i)),

sys/arch/powerpc/booke/dev/pq3etsec.c

1175

i, GADDR(i), etsec_read(sc, GADDR(i)));

sys/arch/powerpc/booke/dev/pq3etsec.c

1185

i+1, MACnADDR1(i), etsec_read(sc, MACnADDR1(i)),

sys/arch/powerpc/booke/dev/pq3etsec.c

1186

i+1, MACnADDR2(i), etsec_read(sc, MACnADDR2(i)));

sys/arch/powerpc/booke/dev/pq3etsec.c

1528

uint32_t qhlt = etsec_read(sc, RSTAT) & RSTAT_QHLT;

sys/arch/powerpc/booke/dev/pq3etsec.c

2266

KASSERT((etsec_read(sc, MACCFG1) & MACCFG1_TX_EN) == 0);

sys/arch/powerpc/booke/dev/pq3etsec.c

2373

uint32_t ievent = etsec_read(sc, IEVENT);

sys/arch/powerpc/booke/dev/pq3etsec.c

2379

__func__, ievent, etsec_read(sc, IMASK));

sys/arch/powerpc/booke/dev/pq3etsec.c

2406

uint32_t ievent = etsec_read(sc, IEVENT);

sys/arch/powerpc/booke/dev/pq3etsec.c

2438

uint32_t ievent = etsec_read(sc, IEVENT);

sys/arch/powerpc/booke/dev/pq3etsec.c

2451

__func__, ievent, etsec_read(sc, IMASK));

sys/arch/powerpc/booke/dev/pq3etsec.c

609

sc->sc_macstnaddr2 = etsec_read(sc, MACSTNADDR2);

sys/arch/powerpc/booke/dev/pq3etsec.c

610

sc->sc_macstnaddr1 = etsec_read(sc, MACSTNADDR1);

sys/arch/powerpc/booke/dev/pq3etsec.c

612

sc->sc_ecntrl = etsec_read(sc, ECNTRL);

sys/arch/powerpc/booke/dev/pq3etsec.c

613

sc->sc_maccfg1 = etsec_read(sc, MACCFG1);

sys/arch/powerpc/booke/dev/pq3etsec.c

614

sc->sc_maccfg2 = etsec_read(sc, MACCFG2) | MACCFG2_DEFAULT;