CCU_WRITE
CCU_WRITE(sc, CPUX_AXI_CFG_REG, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, CPUX_AXI_CFG_REG, val);
CCU_WRITE(sc, SDMMC2_CLK_REG, val);
CCU_WRITE(sc, AHB2_CFG_REG, val);
CCU_WRITE(sc, AHB2_CFG_REG, val);
CCU_WRITE(sc, CPU_CLK_SRC_REG, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, CPU_CLK_SRC_SELECT(cluster), val);
CCU_WRITE(sc, reset->reg, val & ~reset->mask);
CCU_WRITE(sc, reset->reg, val | reset->mask);
CCU_WRITE(sc, div->reg, val);
CCU_WRITE(sc, div->reg, val);
CCU_WRITE(sc, div->reg, val);
CCU_WRITE(sc, fractional->reg, val);
CCU_WRITE(sc, fractional->reg, val);
CCU_WRITE(sc, fractional->reg, val);
CCU_WRITE(sc, gate->reg, val);
CCU_WRITE(sc, mux->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nkmp->reg, val);
CCU_WRITE(sc, nm->reg, val);
CCU_WRITE(sc, nm->reg, val);
CCU_WRITE(sc, nm->reg, val);
CCU_WRITE(sc, nm->reg, val);
CCU_WRITE(sc, phase->reg, val);
CCU_WRITE(sc, prediv->reg, val);