atomic_and_32
atomic_op_alias(atomic_and_32,_atomic_and_32)
atomic_and_32(&ci->ci_flags, ~CPUF_PAUSE);
atomic_and_32(&sc->sc_enabled_sgippi, ~mask);
atomic_and_32(ipending, ~__BIT(irq));
atomic_and_32(iblocked, ~blocked);
atomic_and_32(&ci->ci_flags, ~CPUF_PAUSE);
atomic_and_32(&sc->sc_pending, ~PMU_EV_LID);
atomic_and_32(&sc->sc_pending, ~PMU_EV_BUTTON);
atomic_and_32(&sc->sc_pending, ~socket);
#define CPUSET_DEL(set, cpu) atomic_and_32(&(set), ~CPUSET_SINGLE(cpu))
#define CPUSET_SUB(set1, set2) atomic_and_32(&(set1), ~(set2))
atomic_and_32(&ci->ci_flags, ~CPUF_RUNNING);
atomic_and_32(&ci->ci_flags, ~CPUF_RUNNING);
atomic_and_32(&dmv->flags, ~(DM_SUSPEND_FLAG | DM_INACTIVE_PRESENT_FLAG));
atomic_and_32(&dmv->flags, ~DM_INACTIVE_PRESENT_FLAG);
atomic_and_32(&sc->sc_state, ~UHID_IMMED);
atomic_and_32(&sc->sc_flags, (uint32_t)~VMBUS_SCFLAG_SYNIC);
atomic_and_32(((volatile u_int *)p) + (b >> 5), ~(1 << (b & 0x1f)));
atomic_and_32(&(adapter)->flags, ENA_FLAG_BITMASK(bit))
atomic_and_32(&node->tn_gen, ~TMPFS_NODE_GEN_MASK);
atomic_and_32(&kcp->bits[j], ~(__BIT(i & KC_MASK)));
atomic_and_32(&kcp1->bits[j], kcp2->bits[j]);
atomic_and_32(&kcp1->bits[j], ~kcp2->bits[j]);
ATF_TP_ADD_TC(tp, atomic_and_32);
atf_and(atomic_and_32, uint32_t, PRIx32);