CACHE_LINE_SIZE
pmap_pvlist_lock_init(CACHE_LINE_SIZE);
KASSERT(((uintptr_t)ci & (CACHE_LINE_SIZE - 1)) == 0);
KASSERTMSG(arm_dcache_align <= CACHE_LINE_SIZE,
arm_dcache_align, CACHE_LINE_SIZE);
#if CACHE_LINE_SIZE != 32
uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
start += CACHE_LINE_SIZE;
uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
start += CACHE_LINE_SIZE;
uint32_t start = ((uint32_t)addr & ~(CACHE_LINE_SIZE - 1));
uint32_t end = roundup((uint32_t)addr + size, CACHE_LINE_SIZE);
start += CACHE_LINE_SIZE;
if (((uint32_t)buf & (CACHE_LINE_SIZE - 1)) != 0) {
struct cpu_info cpu_info_primary __aligned(CACHE_LINE_SIZE);
u_int riscv_dcache_align = CACHE_LINE_SIZE;
u_int riscv_dcache_align_mask = CACHE_LINE_SIZE - 1;
pmap_pvlist_lock_init(CACHE_LINE_SIZE);
} cntr __aligned(CACHE_LINE_SIZE);
struct cpu_info cpu_info_primary __aligned(CACHE_LINE_SIZE) = {
sizeof(*ci) + CACHE_LINE_SIZE - 1, 0,
ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
CTASSERT(CACHE_LINE_SIZE > sizeof(pt_entry_t));
CTASSERT(CACHE_LINE_SIZE % sizeof(pt_entry_t) == 0);
npages = (CACHE_LINE_SIZE / sizeof(pt_entry_t));
KASSERT((vaddr_t)&PTE_BASE[pl1_i(vabase)] % CACHE_LINE_SIZE == 0);
struct cpu_info cpu_info_primary __aligned(CACHE_LINE_SIZE) = {
struct cpu_info phycpu_info_primary __aligned(CACHE_LINE_SIZE) = {
ptr = (uintptr_t)kmem_zalloc(sizeof(*ci) + CACHE_LINE_SIZE - 1,
ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
ptr = (uintptr_t)kmem_alloc(sizeof(*ci) + CACHE_LINE_SIZE - 1,
ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
size = CACHE_LINE_SIZE;
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
__aligned(CACHE_LINE_SIZE); /* stable */
__aligned(CACHE_LINE_SIZE);
__aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE) tprof_cpu_t;
#define EHCI_ITD_ALLOC_ALIGN MAX(EHCI_ITD_ALIGN, CACHE_LINE_SIZE)
#define EHCI_SITD_ALLOC_ALIGN MAX(EHCI_SITD_ALIGN, CACHE_LINE_SIZE)
#define EHCI_QTD_ALLOC_ALIGN MAX(EHCI_QTD_ALIGN, CACHE_LINE_SIZE)
#define EHCI_QH_ALLOC_ALIGN MAX(EHCI_QH_ALIGN, CACHE_LINE_SIZE)
#define OHCI_ED_ALLOC_ALIGN MAX(OHCI_ED_ALIGN, CACHE_LINE_SIZE)
#define OHCI_TD_ALLOC_ALIGN MAX(OHCI_TD_ALIGN, CACHE_LINE_SIZE)
#define OHCI_ITD_ALLOC_ALIGN MAX(OHCI_ITD_ALIGN, CACHE_LINE_SIZE)
#define USB_MEM_SMALL roundup(64, CACHE_LINE_SIZE)
CTASSERT(CACHE_LINE_SIZE >= sizeof(__cpu_simple_lock_t));
__cpu_simple_lock_t lock __aligned(CACHE_LINE_SIZE);
} kernel_lock_cacheline[CACHE_LINE_SIZE / sizeof(struct kernel_lock)]
#define IPI_MSG_SLOTS (CACHE_LINE_SIZE / sizeof(ipi_msg_t *))
CTASSERT(CACHE_LINE_SIZE == 32 ||
CACHE_LINE_SIZE == 64 ||
CACHE_LINE_SIZE == 128 ||
CACHE_LINE_SIZE == 256);
CTASSERT(CACHE_LINE_SIZE == 32 ||
CACHE_LINE_SIZE == 64 ||
CACHE_LINE_SIZE == 128 ||
CACHE_LINE_SIZE == 256);
CTASSERT(CACHE_LINE_SIZE == 32 ||
CACHE_LINE_SIZE == 64 ||
CACHE_LINE_SIZE == 128 ||
CACHE_LINE_SIZE == 256);
#if CACHE_LINE_SIZE >= 128
#define FATP_NTAGS (CACHE_LINE_SIZE / sizeof(fatp_word_t) - 1)
int rcpu_align[0] __aligned(CACHE_LINE_SIZE);
#define FDFILE_SIZE ((sizeof(fdfile_t)+CACHE_LINE_SIZE-1)/CACHE_LINE_SIZE*CACHE_LINE_SIZE)
#ifndef CACHE_LINE_SIZE
__aligned(CACHE_LINE_SIZE);
pool_cache_cpu_t pc_cpu0 __aligned(CACHE_LINE_SIZE);