X1
goto X1;
X1:
goto X1;
X1:
uwd->X1.r = ((buf[1] & 0x80) == 0x80);
uwd->X1.a = ((buf[1] & 0x40) == 0x40);
uwd->X1.b = ((buf[1] & 0x20) == 0x20);
uwd->X1.reg = (buf[1] & 0x1f);
buf = unwind_decode_ule128(buf, &uwd->X1.t);
buf = unwind_decode_ule128(buf, &uwd->X1.offset);
struct unwind_desc_X1 X1;
case X1:
strc[rec_cnt].type = X1;
case X1:
case X1:
X1(FPE_FLTRES),
X1(FPE_FLTINEX_TRAP),
X1(FSR_NX),
X1(ADCCR_LCHANENABLE) | X1(ADCCR_RCHANENABLE));
emuxki_write(sc, 0, X1(ADCIDX), 0);
emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP));
emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP));
X1(DSP_CST(0)),
X1(DSP_FX(0)),
X1(DSP_CST(1)));
X1(DSP_CST(0)),
X1(DSP_FX(1)),
X1(DSP_CST(1)));
X1(DSP_CST(0)),
X1(DSP_FX(0)),
X1(DSP_CST(1)));
X1(DSP_CST(0)),
X1(DSP_FX(1)),
X1(DSP_CST(1)));
X1(DSP_CST(0)),
X1(DSP_CST(0)));
X1(DSP_CST(0)),
X1(DSP_CST(0)));
X1(DSP_CST(0)),
X1(DSP_CST(0)),
X1(DSP_CST(0)),
X1(DSP_CST(0)));
emuxki_write(sc, 0, X1(DBG), 0);
X1a += X1(i);
X1X1s += X1(i) * X1(i);
X1X2s += X1(i) * X2(i);
X1Ys += X1(i) * Y(i);