sys/arch/arm/sociox/if_scx.c

1957

(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val | BMCR_RESET);

sys/arch/arm/sociox/if_scx.c

1961

} while (loop-- > 0 && (val & BMCR_RESET) != 0);

sys/arch/cobalt/stand/boot/tlp.c

469

tlp_mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/cobalt/stand/boot/tlp.c

478

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/pcn.c

360

pcn_mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/pcn.c

369

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/rge.c

373

mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/rge.c

382

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/sip.c

388

mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/sip.c

397

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/stg.c

459

mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/stg.c

469

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/tlp.c

386

mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/tlp.c

395

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/arch/sandpoint/stand/altboot/wm.c

417

mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);

sys/arch/sandpoint/stand/altboot/wm.c

426

} while (bound-- > 0 && (ctl & BMCR_RESET));

sys/dev/ic/dm9000.c

326

mii_writereg(sc->sc_dev, 1, MII_BMCR, BMCR_RESET);

sys/dev/mii/atphy.c

455

reg |= BMCR_RESET;

sys/dev/mii/atphy.c

461

if ((reg & BMCR_RESET) == 0)

sys/dev/mii/gphyter.c

308

reg = BMCR_RESET;

sys/dev/mii/gphyter.c

310

reg = BMCR_RESET | BMCR_ISO;

sys/dev/mii/gphyter.c

326

if ((reg & BMCR_RESET) == 0)

sys/dev/mii/ihphy.c

295

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);

sys/dev/mii/ihphy.c

300

if ((reg & BMCR_RESET) == 0)

sys/dev/mii/jmphy.c

272

PHY_WRITE(sc, MII_BMCR, val | BMCR_RESET);

sys/dev/mii/jmphy.c

277

if ((val & BMCR_RESET) == 0)

sys/dev/mii/makphy.c

367

new |= BMCR_RESET;

sys/dev/mii/makphy.c

418

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET);

sys/dev/mii/mii_physubr.c

404

reg = BMCR_RESET;

sys/dev/mii/mii_physubr.c

406

reg = BMCR_RESET | BMCR_ISO;

sys/dev/mii/mii_physubr.c

412

if ((reg & BMCR_RESET) == 0)

sys/dev/mii/mvphy.c

306

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);

sys/dev/mii/nsphy.c

319

reg = BMCR_RESET;

sys/dev/mii/nsphy.c

321

reg = BMCR_RESET | BMCR_ISO;

sys/dev/mii/nsphy.c

341

if (reg && ((reg & BMCR_RESET) == 0))

sys/dev/mii/nsphyter.c

266

reg = BMCR_RESET;

sys/dev/mii/nsphyter.c

268

reg = BMCR_RESET | BMCR_ISO;

sys/dev/mii/nsphyter.c

284

if ((reg & BMCR_RESET) == 0)

sys/dev/mii/rgephy.c

671

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/pci/cxgb/cxgb_t3_hw.c

347

err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET);

sys/dev/pci/cxgb/cxgb_t3_hw.c

355

ctl &= BMCR_RESET;

sys/dev/pci/if_age.c

633

age_miibus_writereg(sc->sc_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);

sys/dev/pci/if_age.c

653

BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/pci/if_bge.c

4008

MII_BMCR, BMCR_RESET);

sys/dev/pci/if_bge.c

4013

if ((phyreg & BMCR_RESET) == 0)

sys/dev/pci/if_dge.c

2445

dge_xgmii_writereg(sc, 0, 0, BMCR_RESET);

sys/dev/pci/if_rge.c

1214

rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |

sys/dev/pci/if_rge.c

2218

rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |

sys/dev/pci/if_rge.c

2221

if (!(rge_read_phy(sc, 0, MII_BMCR) & BMCR_RESET))

sys/dev/pci/if_sk.c

2444

SK_PHYADDR_BCOM, MII_BMCR, BMCR_RESET);

sys/dev/sbus/be.c

1341

be_mii_writereg(self, phy, MII_BMCR, BMCR_RESET);

sys/dev/sbus/be.c

1347

if ((bmcr & BMCR_RESET) == 0)