sys/arch/sparc/fpu/fpu.c

385

cond = (curlwp->l_md.md_tf->tf_tstate>>TSTATE_CCR_SHIFT)&PSR_ICC;

sys/arch/sparc/fpu/fpu.c

392

cond = (curlwp->l_md.md_tf->tf_tstate>>(TSTATE_CCR_SHIFT+XCC_SHIFT))&PSR_ICC;

sys/arch/sparc/include/psl.h

166

#define PSRCC_TO_TSTATE(x) (((int64_t)(x)&PSR_ICC)<<(TSTATE_CCR_SHIFT-20))

sys/arch/sparc/include/psl.h

167

#define TSTATECCR_TO_PSR(x) (((x)&TSTATE_CCR)>>(TSTATE_CCR_SHIFT-20))

sys/arch/sparc64/include/psl.h

183

#define PSRCC_TO_TSTATE(x) (((int64_t)(x)&PSR_ICC)<<(TSTATE_CCR_SHIFT-20))

sys/arch/sparc64/include/psl.h

184

#define TSTATECCR_TO_PSR(x) (((x)&TSTATE_CCR)>>(TSTATE_CCR_SHIFT-20))

sys/arch/sparc64/sparc64/emul.c

192

tf->tf_tstate |= (uint64_t)(ICC_Z|XCC_Z) << TSTATE_CCR_SHIFT;

sys/arch/sparc64/sparc64/emul.c

195

tf->tf_tstate |= (uint64_t)(ICC_N|XCC_N) << TSTATE_CCR_SHIFT;

sys/arch/sparc64/sparc64/emul.c

198

tf->tf_tstate |= (uint64_t)(ICC_V|XCC_V) << TSTATE_CCR_SHIFT;

sys/arch/sparc64/sparc64/emul.c

202

tf->tf_tstate |= (uint64_t)(ICC_V|XCC_V) << TSTATE_CCR_SHIFT;

sys/arch/sparc64/sparc64/machdep.c

2438

gr[_REG_CCR] = (tf->tf_tstate & TSTATE_CCR) >> TSTATE_CCR_SHIFT;

sys/arch/sparc64/sparc64/machdep.c

2547

((gr[_REG_CCR] << TSTATE_CCR_SHIFT) & TSTATE_CCR) |

sys/arch/sparc64/sparc64/syscall.c

335

TSTATE_CCR_SHIFT); /* success */

sys/arch/sparc64/sparc64/syscall.c

353

TSTATE_CCR_SHIFT); /* fail */