sys/arch/amiga/dev/sbicreg.h

258

#define SBIC_PHASE(csr) SCSI_PHASE(csr)

sys/arch/amiga/dev/scireg.h

132

#define SCI_CUR_PHASE(x) SCSI_PHASE((x)>>2)

sys/arch/amiga/dev/siopreg.h

325

#define SIOP_PHASE(socl) SCSI_PHASE(socl)

sys/arch/mac68k/include/scsi_5380.h

113

#define SCI_PHASE(x) SCSI_PHASE(x)

sys/arch/mac68k/include/scsi_5380.h

128

#define SCI_CUR_PHASE(x) SCSI_PHASE((x)>>2)

sys/arch/mvme68k/dev/sbicreg.h

258

#define SBIC_PHASE(csr) SCSI_PHASE(csr)

sys/arch/sgimips/stand/common/iris_scsireg.h

331

#define SBIC_PHASE(csr) SCSI_PHASE(csr)

sys/dev/ic/oosiopreg.h

164

#define OOSIOP_PHASE(socl) SCSI_PHASE(socl)

sys/dev/ic/wd33c93.c

2383

switch (SCSI_PHASE(csr)) {

sys/dev/ic/wd33c93reg.h

305

#define SBIC_PHASE(csr) SCSI_PHASE(csr)