Symbol: SCI_CSR_PHASE_MATCH
sys/arch/amiga/dev/ivsc.c
211
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/ivsc.c
212
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/ivsc.c
213
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/ivsc.c
248
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/ivsc.c
249
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/ivsc.c
250
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/ivsc.c
295
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/ivsc.c
296
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/ivsc.c
297
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/ivsc.c
315
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
sys/arch/amiga/dev/ivsc.c
316
SCI_CSR_PHASE_MATCH && --wait);
sys/arch/amiga/dev/mlhsc.c
201
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/mlhsc.c
202
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/mlhsc.c
203
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/mlhsc.c
237
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/mlhsc.c
238
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/mlhsc.c
239
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/mlhsc.c
288
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/mlhsc.c
289
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/mlhsc.c
290
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/mlhsc.c
316
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/mlhsc.c
317
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/mlhsc.c
318
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/mlhsc.c
336
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
sys/arch/amiga/dev/mlhsc.c
337
SCI_CSR_PHASE_MATCH && --wait);
sys/arch/amiga/dev/otgsc.c
204
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/otgsc.c
205
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/otgsc.c
206
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/otgsc.c
251
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/otgsc.c
252
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/otgsc.c
253
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/otgsc.c
271
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
sys/arch/amiga/dev/otgsc.c
272
SCI_CSR_PHASE_MATCH && --wait);
sys/arch/amiga/dev/sci.c
432
if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH))
sys/arch/amiga/dev/sci.c
479
if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH))
sys/arch/amiga/dev/wstsc.c
223
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
224
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
225
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
260
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
261
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
262
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
307
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
308
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
309
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
327
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
sys/arch/amiga/dev/wstsc.c
328
SCI_CSR_PHASE_MATCH && --wait);
sys/arch/amiga/dev/wstsc.c
360
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
361
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
362
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
393
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
394
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
395
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
452
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
453
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
454
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
486
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
sys/arch/amiga/dev/wstsc.c
487
(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/amiga/dev/wstsc.c
488
if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
sys/arch/amiga/dev/wstsc.c
517
while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
sys/arch/amiga/dev/wstsc.c
518
SCI_CSR_PHASE_MATCH && --wait);
sys/arch/mac68k/dev/sbc.c
134
if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
sys/arch/mac68k/dev/sbc.c
135
== (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/mac68k/dev/sbc.c
139
if (((*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0)
sys/arch/mac68k/dev/sbc.c
157
if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
sys/arch/mac68k/dev/sbc.c
158
== (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
sys/arch/mac68k/dev/sbc.c
185
if (((*ncr_sc->sci_csr & ~SCI_CSR_PHASE_MATCH) == SCI_CSR_INT)
sys/arch/mac68k/dev/sbc.c
209
if (((csr & ~(SCI_CSR_PHASE_MATCH | SCI_CSR_ATN)) == SCI_CSR_INT) &&
sys/arch/mac68k/dev/sbc.c
218
else if (((csr & ~SCI_CSR_PHASE_MATCH) == SCI_CSR_INT) &&
sys/arch/mac68k/dev/sbc.c
221
else if (((csr & ~(SCI_CSR_DREQ | SCI_CSR_ATN | SCI_CSR_ACK)) == (SCI_CSR_PERR | SCI_CSR_INT | SCI_CSR_PHASE_MATCH)) &&
sys/arch/mac68k/dev/sbc.c
227
else if (((csr & ~SCI_CSR_PHASE_MATCH) == (SCI_CSR_INT | SCI_CSR_DISC)) &&
sys/arch/mac68k/dev/sbc.c
408
if ((*ncr_sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0) {
sys/dev/podulebus/hcsc.c
235
(SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH)) ==
sys/dev/podulebus/hcsc.c
236
(SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH))
sys/dev/podulebus/hcsc.c
239
if ((NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
sys/dev/podulebus/hcsc.c
256
(NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
sys/dev/podulebus/hcsc.c
356
& (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
sys/dev/podulebus/oak.c
233
if ((status & (SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH)) ==
sys/dev/podulebus/oak.c
234
(SCI_CSR_DREQ | SCI_CSR_PHASE_MATCH))
sys/dev/podulebus/oak.c
237
if ((status & SCI_CSR_PHASE_MATCH) == 0 ||
sys/dev/podulebus/oak.c
271
(NCR5380_READ(sc, sci_csr) & SCI_CSR_PHASE_MATCH) == 0 ||
sys/dev/podulebus/oak.c
376
& (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))