sys/arch/sparc/fpu/fpu.c

385

cond = (curlwp->l_md.md_tf->tf_tstate>>TSTATE_CCR_SHIFT)&PSR_ICC;

sys/arch/sparc/fpu/fpu.c

392

cond = (curlwp->l_md.md_tf->tf_tstate>>(TSTATE_CCR_SHIFT+XCC_SHIFT))&PSR_ICC;

sys/arch/sparc/include/psl.h

166

#define PSRCC_TO_TSTATE(x) (((int64_t)(x)&PSR_ICC)<<(TSTATE_CCR_SHIFT-20))

sys/arch/sparc/sparc/compat_13_machdep.c

95

tf->tf_psr = (tf->tf_psr & ~PSR_ICC) | (scp->sc_psr & PSR_ICC);

sys/arch/sparc/sparc/compat_16_machdep.c

297

tf->tf_psr = (tf->tf_psr & ~PSR_ICC) | (scp->sc_psr & PSR_ICC);

sys/arch/sparc/sparc/emul.c

190

tf->tf_psr &= ~PSR_ICC;

sys/arch/sparc/sparc/machdep.c

742

tf->tf_psr = (tf->tf_psr & ~PSR_ICC) |

sys/arch/sparc/sparc/machdep.c

743

(r[_REG_PSR] & PSR_ICC);

sys/arch/sparc/sparc/process_machdep.c

125

int psr = l->l_md.md_tf->tf_psr & ~PSR_ICC;

sys/arch/sparc/sparc/process_machdep.c

131

l->l_md.md_tf->tf_psr = psr | (regs->r_psr & PSR_ICC);

sys/arch/sparc64/include/psl.h

183

#define PSRCC_TO_TSTATE(x) (((int64_t)(x)&PSR_ICC)<<(TSTATE_CCR_SHIFT-20))