sys/arch/arm/at91/at91bus.c

610

AT91_MSTCLK / 1000000U, (AT91_MSTCLK / 1000U) % 1000U,

sys/arch/arm/at91/at91dbgu.c

233

DBGU_INIT(AT91_MSTCLK, 115200U);

sys/arch/arm/at91/at91dbgu.c

325

sc->sc_brgr = (AT91_MSTCLK / 16 + t->c_ospeed / 2) / t->c_ospeed;

sys/arch/arm/at91/at91dbgu.c

824

DBGU_INIT(AT91_MSTCLK, ospeed);

sys/arch/arm/at91/at91spi.c

212

scbr = speed ? ((AT91_MSTCLK + speed - 1) / speed + 1) & ~1 : -1;

sys/arch/arm/at91/at91tctmr.c

198

if (AT91_MSTCLK / 2U / HZ <= 65536) {

sys/arch/arm/at91/at91tctmr.c

199

sc->sc_timerclock = AT91_MSTCLK / 2U;

sys/arch/arm/at91/at91tctmr.c

201

} else if (AT91_MSTCLK / 8U / HZ <= 65536) {

sys/arch/arm/at91/at91tctmr.c

202

sc->sc_timerclock = AT91_MSTCLK / 8U;

sys/arch/arm/at91/at91tctmr.c

204

} else if (AT91_MSTCLK / 32U / HZ <= 65536) {

sys/arch/arm/at91/at91tctmr.c

205

sc->sc_timerclock = AT91_MSTCLK / 32U;

sys/arch/arm/at91/at91tctmr.c

207

} else if (AT91_MSTCLK / 128U / HZ <= 65536) {

sys/arch/arm/at91/at91tctmr.c

208

sc->sc_timerclock = AT91_MSTCLK / 128U;

sys/arch/arm/at91/at91twi.c

101

if ((cxdiv = (AT91_MSTCLK / (1U << ckdiv)) / (2 * 50000U)) < 256) {

sys/arch/arm/at91/at91usart.c

363

sc->sc_brgr = (AT91_MSTCLK / 16 + t->c_ospeed / 2) / t->c_ospeed;

sys/arch/arm/at91/at91usartreg.h

163

(AT91_MSTCLK / 16 + (speed) / 2) / (speed)); \