root/drivers/gpu/drm/panthor/panthor_pwr_regs.h
/* SPDX-License-Identifier: GPL-2.0 or MIT */
/* Copyright 2026 ARM Limited. All rights reserved. */

#ifndef __PANTHOR_PWR_REGS_H__
#define __PANTHOR_PWR_REGS_H__

#define PWR_CONTROL_BASE                                0x800

#define PWR_INT_BASE                                    0x0
#define   PWR_IRQ_POWER_CHANGED_SINGLE                  BIT(0)
#define   PWR_IRQ_POWER_CHANGED_ALL                     BIT(1)
#define   PWR_IRQ_DELEGATION_CHANGED                    BIT(2)
#define   PWR_IRQ_RESET_COMPLETED                       BIT(3)
#define   PWR_IRQ_RETRACT_COMPLETED                     BIT(4)
#define   PWR_IRQ_INSPECT_COMPLETED                     BIT(5)
#define   PWR_IRQ_COMMAND_NOT_ALLOWED                   BIT(30)
#define   PWR_IRQ_COMMAND_INVALID                       BIT(31)

#define PWR_STATUS                                      0x20
#define   PWR_STATUS_ALLOW_L2                           BIT_U64(0)
#define   PWR_STATUS_ALLOW_TILER                        BIT_U64(1)
#define   PWR_STATUS_ALLOW_SHADER                       BIT_U64(8)
#define   PWR_STATUS_ALLOW_BASE                         BIT_U64(14)
#define   PWR_STATUS_ALLOW_STACK                        BIT_U64(15)
#define   PWR_STATUS_DOMAIN_ALLOWED(x)                  BIT_U64(x)
#define   PWR_STATUS_DELEGATED_L2                       BIT_U64(16)
#define   PWR_STATUS_DELEGATED_TILER                    BIT_U64(17)
#define   PWR_STATUS_DELEGATED_SHADER                   BIT_U64(24)
#define   PWR_STATUS_DELEGATED_BASE                     BIT_U64(30)
#define   PWR_STATUS_DELEGATED_STACK                    BIT_U64(31)
#define   PWR_STATUS_DELEGATED_SHIFT                    16
#define   PWR_STATUS_DOMAIN_DELEGATED(x)                BIT_U64((x) + PWR_STATUS_DELEGATED_SHIFT)
#define   PWR_STATUS_ALLOW_SOFT_RESET                   BIT_U64(33)
#define   PWR_STATUS_ALLOW_FAST_RESET                   BIT_U64(34)
#define   PWR_STATUS_POWER_PENDING                      BIT_U64(41)
#define   PWR_STATUS_RESET_PENDING                      BIT_U64(42)
#define   PWR_STATUS_RETRACT_PENDING                    BIT_U64(43)
#define   PWR_STATUS_INSPECT_PENDING                    BIT_U64(44)

#define PWR_COMMAND                                     0x28
#define   PWR_COMMAND_POWER_UP                          0x10
#define   PWR_COMMAND_POWER_DOWN                        0x11
#define   PWR_COMMAND_DELEGATE                          0x20
#define   PWR_COMMAND_RETRACT                           0x21
#define   PWR_COMMAND_RESET_SOFT                        0x31
#define   PWR_COMMAND_RESET_FAST                        0x32
#define   PWR_COMMAND_INSPECT                           0xF0
#define   PWR_COMMAND_DOMAIN_L2                         0
#define   PWR_COMMAND_DOMAIN_TILER                      1
#define   PWR_COMMAND_DOMAIN_SHADER                     8
#define   PWR_COMMAND_DOMAIN_BASE                       14
#define   PWR_COMMAND_DOMAIN_STACK                      15
#define   PWR_COMMAND_SUBDOMAIN_RTU                     BIT(0)
#define   PWR_COMMAND_DEF(cmd, domain, subdomain)       \
        (((subdomain) << 16) | ((domain) << 8) | (cmd))

#define PWR_CMDARG                                      0x30

#define PWR_L2_PRESENT                                  0x100
#define PWR_L2_READY                                    0x108
#define PWR_L2_PWRTRANS                                 0x110
#define PWR_L2_PWRACTIVE                                0x118
#define PWR_TILER_PRESENT                               0x140
#define PWR_TILER_READY                                 0x148
#define PWR_TILER_PWRTRANS                              0x150
#define PWR_TILER_PWRACTIVE                             0x158
#define PWR_SHADER_PRESENT                              0x200
#define PWR_SHADER_READY                                0x208
#define PWR_SHADER_PWRTRANS                             0x210
#define PWR_SHADER_PWRACTIVE                            0x218
#define PWR_BASE_PRESENT                                0x380
#define PWR_BASE_READY                                  0x388
#define PWR_BASE_PWRTRANS                               0x390
#define PWR_BASE_PWRACTIVE                              0x398
#define PWR_STACK_PRESENT                               0x3c0
#define PWR_STACK_READY                                 0x3c8
#define PWR_STACK_PWRTRANS                              0x3d0

#endif /* __PANTHOR_PWR_REGS_H__ */