/*
 * Copyright 2025 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef _gc_12_1_1_OFFSET_HEADER
#define _gc_12_1_1_OFFSET_HEADER



// addressBlock: aigc_grbma_grbma_grbmadec
// base address: 0x18000
#define regGRBMA_GFX_INDEX                                                                              0x0011
#define regGRBMA_GFX_INDEX_BASE_IDX                                                                     1


// addressBlock: aigc_grbma_grbma_perfddec
// base address: 0x19200
#define regGRBMA_PERFCOUNTER0_LO                                                                        0x0480
#define regGRBMA_PERFCOUNTER0_LO_BASE_IDX                                                               1
#define regGRBMA_PERFCOUNTER0_HI                                                                        0x0481
#define regGRBMA_PERFCOUNTER0_HI_BASE_IDX                                                               1
#define regGRBMA_PERFCOUNTER1_LO                                                                        0x0482
#define regGRBMA_PERFCOUNTER1_LO_BASE_IDX                                                               1
#define regGRBMA_PERFCOUNTER1_HI                                                                        0x0483
#define regGRBMA_PERFCOUNTER1_HI_BASE_IDX                                                               1


// addressBlock: aigc_grbma_grbma_perfsdec
// base address: 0x19300
#define regGRBMA_PERFCOUNTER0_SELECT                                                                    0x04c0
#define regGRBMA_PERFCOUNTER0_SELECT_BASE_IDX                                                           1
#define regGRBMA_PERFCOUNTER1_SELECT                                                                    0x04c1
#define regGRBMA_PERFCOUNTER1_SELECT_BASE_IDX                                                           1
#define regAID_PERFMON_CNTL                                                                             0x04c2
#define regAID_PERFMON_CNTL_BASE_IDX                                                                    1


// addressBlock: aigc_gl2x_gfx_se_perfsdec
// base address: 0x19300
#define regGL2C_PERFCOUNTER0_SELECT                                                                     0x04e8
#define regGL2C_PERFCOUNTER0_SELECT_BASE_IDX                                                            1
#define regGL2C_PERFCOUNTER0_SELECT1                                                                    0x04e9
#define regGL2C_PERFCOUNTER0_SELECT1_BASE_IDX                                                           1
#define regGL2C_PERFCOUNTER1_SELECT                                                                     0x04ea
#define regGL2C_PERFCOUNTER1_SELECT_BASE_IDX                                                            1
#define regGL2C_PERFCOUNTER1_SELECT1                                                                    0x04eb
#define regGL2C_PERFCOUNTER1_SELECT1_BASE_IDX                                                           1
#define regGL2C_PERFCOUNTER2_SELECT                                                                     0x04ec
#define regGL2C_PERFCOUNTER2_SELECT_BASE_IDX                                                            1
#define regGL2C_PERFCOUNTER2_SELECT1                                                                    0x04ed
#define regGL2C_PERFCOUNTER2_SELECT1_BASE_IDX                                                           1
#define regGL2C_PERFCOUNTER3_SELECT                                                                     0x04ee
#define regGL2C_PERFCOUNTER3_SELECT_BASE_IDX                                                            1
#define regGL2C_PERFCOUNTER3_SELECT1                                                                    0x04ef
#define regGL2C_PERFCOUNTER3_SELECT1_BASE_IDX                                                           1
#define regGL2A_PERFCOUNTER0_SELECT                                                                     0x04f0
#define regGL2A_PERFCOUNTER0_SELECT_BASE_IDX                                                            1
#define regGL2A_PERFCOUNTER0_SELECT1                                                                    0x04f1
#define regGL2A_PERFCOUNTER0_SELECT1_BASE_IDX                                                           1
#define regGL2A_PERFCOUNTER1_SELECT                                                                     0x04f2
#define regGL2A_PERFCOUNTER1_SELECT_BASE_IDX                                                            1
#define regGL2A_PERFCOUNTER1_SELECT1                                                                    0x04f3
#define regGL2A_PERFCOUNTER1_SELECT1_BASE_IDX                                                           1
#define regGL2A_PERFCOUNTER2_SELECT                                                                     0x04f4
#define regGL2A_PERFCOUNTER2_SELECT_BASE_IDX                                                            1
#define regGL2A_PERFCOUNTER2_SELECT1                                                                    0x04f5
#define regGL2A_PERFCOUNTER2_SELECT1_BASE_IDX                                                           1
#define regGL2A_PERFCOUNTER3_SELECT                                                                     0x04f6
#define regGL2A_PERFCOUNTER3_SELECT_BASE_IDX                                                            1
#define regGL2A_PERFCOUNTER3_SELECT1                                                                    0x04f7
#define regGL2A_PERFCOUNTER3_SELECT1_BASE_IDX                                                           1


// addressBlock: aigc_gl2x_gfx_se_perfddec
// base address: 0x19200
#define regGL2C_PERFCOUNTER0_LO                                                                         0x04a0
#define regGL2C_PERFCOUNTER0_LO_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER0_HI                                                                         0x04a1
#define regGL2C_PERFCOUNTER0_HI_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER1_LO                                                                         0x04a2
#define regGL2C_PERFCOUNTER1_LO_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER1_HI                                                                         0x04a3
#define regGL2C_PERFCOUNTER1_HI_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER2_LO                                                                         0x04a4
#define regGL2C_PERFCOUNTER2_LO_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER2_HI                                                                         0x04a5
#define regGL2C_PERFCOUNTER2_HI_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER3_LO                                                                         0x04a6
#define regGL2C_PERFCOUNTER3_LO_BASE_IDX                                                                1
#define regGL2C_PERFCOUNTER3_HI                                                                         0x04a7
#define regGL2C_PERFCOUNTER3_HI_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER0_LO                                                                         0x04a8
#define regGL2A_PERFCOUNTER0_LO_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER0_HI                                                                         0x04a9
#define regGL2A_PERFCOUNTER0_HI_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER1_LO                                                                         0x04aa
#define regGL2A_PERFCOUNTER1_LO_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER1_HI                                                                         0x04ab
#define regGL2A_PERFCOUNTER1_HI_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER2_LO                                                                         0x04ac
#define regGL2A_PERFCOUNTER2_LO_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER2_HI                                                                         0x04ad
#define regGL2A_PERFCOUNTER2_HI_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER3_LO                                                                         0x04ae
#define regGL2A_PERFCOUNTER3_LO_BASE_IDX                                                                1
#define regGL2A_PERFCOUNTER3_HI                                                                         0x04af
#define regGL2A_PERFCOUNTER3_HI_BASE_IDX                                                                1


// addressBlock: aigc_gfx_gcea_se_gfx_se_perfsdec
// base address: 0x19320
#define regGC_EA_SE_PERFCOUNTER0_SELECT                                                                 0x04c8
#define regGC_EA_SE_PERFCOUNTER0_SELECT_BASE_IDX                                                        1
#define regGC_EA_SE_PERFCOUNTER0_SELECT1                                                                0x04c9
#define regGC_EA_SE_PERFCOUNTER0_SELECT1_BASE_IDX                                                       1
#define regGC_EA_SE_PERFCOUNTER1_SELECT                                                                 0x04ca
#define regGC_EA_SE_PERFCOUNTER1_SELECT_BASE_IDX                                                        1


// addressBlock: aigc_gfx_gcea_se_gfx_se_perfddec
// base address: 0x19240
#define regGC_EA_SE_PERFCOUNTER0_LO                                                                     0x0490
#define regGC_EA_SE_PERFCOUNTER0_LO_BASE_IDX                                                            1
#define regGC_EA_SE_PERFCOUNTER0_HI                                                                     0x0491
#define regGC_EA_SE_PERFCOUNTER0_HI_BASE_IDX                                                            1
#define regGC_EA_SE_PERFCOUNTER1_LO                                                                     0x0492
#define regGC_EA_SE_PERFCOUNTER1_LO_BASE_IDX                                                            1
#define regGC_EA_SE_PERFCOUNTER1_HI                                                                     0x0493
#define regGC_EA_SE_PERFCOUNTER1_HI_BASE_IDX                                                            1

#endif