/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/* Copyright (C) 2019 MediaTek Inc. */

#ifndef __MT7615_MCU_H
#define __MT7615_MCU_H

#include "../mt76_connac_mcu.h"

struct mt7615_mcu_txd {
        __le32 txd[8];

        __le16 len;
        __le16 pq_id;

        u8 cid;
        u8 pkt_type;
        u8 set_query; /* FW don't care */
        u8 seq;

        u8 uc_d2b0_rev;
        u8 ext_cid;
        u8 s2d_index;
        u8 ext_cid_ack;

        u32 reserved[5];
} __packed __aligned(4);

/**
 * struct mt7615_uni_txd - mcu command descriptor for firmware v3
 * @txd: hardware descriptor
 * @len: total length not including txd
 * @cid: command identifier
 * @pkt_type: must be 0xa0 (cmd packet by long format)
 * @frag_n: fragment number
 * @seq: sequence number
 * @checksum: 0 mean there is no checksum
 * @s2d_index: index for command source and destination
 *  Definition              | value | note
 *  CMD_S2D_IDX_H2N         | 0x00  | command from HOST to WM
 *  CMD_S2D_IDX_C2N         | 0x01  | command from WA to WM
 *  CMD_S2D_IDX_H2C         | 0x02  | command from HOST to WA
 *  CMD_S2D_IDX_H2N_AND_H2C | 0x03  | command from HOST to WA and WM
 *
 * @option: command option
 *  BIT[0]: UNI_CMD_OPT_BIT_ACK
 *          set to 1 to request a fw reply
 *          if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
 *          is set, mcu firmware will send response event EID = 0x01
 *          (UNI_EVENT_ID_CMD_RESULT) to the host.
 *  BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
 *          0: original command
 *          1: unified command
 *  BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
 *          0: QUERY command
 *          1: SET command
 */
struct mt7615_uni_txd {
        __le32 txd[8];

        /* DW1 */
        __le16 len;
        __le16 cid;

        /* DW2 */
        u8 reserved;
        u8 pkt_type;
        u8 frag_n;
        u8 seq;

        /* DW3 */
        __le16 checksum;
        u8 s2d_index;
        u8 option;

        /* DW4 */
        u8 reserved2[4];
} __packed __aligned(4);

enum {
    MT_SKU_CCK_1_2 = 0,
    MT_SKU_CCK_55_11,
    MT_SKU_OFDM_6_9,
    MT_SKU_OFDM_12_18,
    MT_SKU_OFDM_24_36,
    MT_SKU_OFDM_48,
    MT_SKU_OFDM_54,
    MT_SKU_HT20_0_8,
    MT_SKU_HT20_32,
    MT_SKU_HT20_1_2_9_10,
    MT_SKU_HT20_3_4_11_12,
    MT_SKU_HT20_5_13,
    MT_SKU_HT20_6_14,
    MT_SKU_HT20_7_15,
    MT_SKU_HT40_0_8,
    MT_SKU_HT40_32,
    MT_SKU_HT40_1_2_9_10,
    MT_SKU_HT40_3_4_11_12,
    MT_SKU_HT40_5_13,
    MT_SKU_HT40_6_14,
    MT_SKU_HT40_7_15,
    MT_SKU_VHT20_0,
    MT_SKU_VHT20_1_2,
    MT_SKU_VHT20_3_4,
    MT_SKU_VHT20_5_6,
    MT_SKU_VHT20_7,
    MT_SKU_VHT20_8,
    MT_SKU_VHT20_9,
    MT_SKU_VHT40_0,
    MT_SKU_VHT40_1_2,
    MT_SKU_VHT40_3_4,
    MT_SKU_VHT40_5_6,
    MT_SKU_VHT40_7,
    MT_SKU_VHT40_8,
    MT_SKU_VHT40_9,
    MT_SKU_VHT80_0,
    MT_SKU_VHT80_1_2,
    MT_SKU_VHT80_3_4,
    MT_SKU_VHT80_5_6,
    MT_SKU_VHT80_7,
    MT_SKU_VHT80_8,
    MT_SKU_VHT80_9,
    MT_SKU_VHT160_0,
    MT_SKU_VHT160_1_2,
    MT_SKU_VHT160_3_4,
    MT_SKU_VHT160_5_6,
    MT_SKU_VHT160_7,
    MT_SKU_VHT160_8,
    MT_SKU_VHT160_9,
    MT_SKU_1SS_DELTA,
    MT_SKU_2SS_DELTA,
    MT_SKU_3SS_DELTA,
    MT_SKU_4SS_DELTA,
};

struct mt7615_mcu_rxd {
        __le32 rxd[4];

        __le16 len;
        __le16 pkt_type_id;

        u8 eid;
        u8 seq;
        __le16 __rsv;

        u8 ext_eid;
        u8 __rsv1[2];
        u8 s2d_index;
};

struct mt7615_mcu_csa_notify {
        struct mt7615_mcu_rxd rxd;

        u8 omac_idx;
        u8 csa_count;
        u8 rsv[2];
} __packed;

struct mt7615_mcu_rdd_report {
        struct mt7615_mcu_rxd rxd;

        u8 band_idx;
        u8 long_detected;
        u8 constant_prf_detected;
        u8 staggered_prf_detected;
        u8 radar_type_idx;
        u8 periodic_pulse_num;
        u8 long_pulse_num;
        u8 hw_pulse_num;

        u8 out_lpn;
        u8 out_spn;
        u8 out_crpn;
        u8 out_crpw;
        u8 out_crbn;
        u8 out_stgpn;
        u8 out_stgpw;

        u8 _rsv[2];

        __le32 out_pri_const;
        __le32 out_pri_stg[3];

        struct {
                __le32 start;
                __le16 pulse_width;
                __le16 pulse_power;
        } long_pulse[32];

        struct {
                __le32 start;
                __le16 pulse_width;
                __le16 pulse_power;
        } periodic_pulse[32];

        struct {
                __le32 start;
                __le16 pulse_width;
                __le16 pulse_power;
                u8 sc_pass;
                u8 sw_reset;
        } hw_pulse[32];
};

enum {
        MCU_ATE_SET_FREQ_OFFSET = 0xa,
        MCU_ATE_SET_TX_POWER_CONTROL = 0x15,
};

struct mt7615_roc_tlv {
        u8 bss_idx;
        u8 token;
        u8 active;
        u8 primary_chan;
        u8 sco;
        u8 band;
        u8 width;       /* To support 80/160MHz bandwidth */
        u8 freq_seg1;   /* To support 80/160MHz bandwidth */
        u8 freq_seg2;   /* To support 80/160MHz bandwidth */
        u8 req_type;
        u8 dbdc_band;
        u8 rsv0;
        __le32 max_interval;    /* ms */
        u8 rsv1[8];
} __packed;

enum {
        FW_STATE_PWR_ON = 1,
        FW_STATE_N9_RDY = 2,
};

enum {
        DBDC_TYPE_WMM,
        DBDC_TYPE_MGMT,
        DBDC_TYPE_BSS,
        DBDC_TYPE_MBSS,
        DBDC_TYPE_REPEATER,
        DBDC_TYPE_MU,
        DBDC_TYPE_BF,
        DBDC_TYPE_PTA,
        __DBDC_TYPE_MAX,
};

#endif