/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2023, Linaro Limited
 */

#ifndef QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_
#define QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_

#define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX                      0x28
#define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX                      0x2c
#define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX               0x30
#define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX               0x34
#define QSERDES_UFS_V6_TX_LANE_MODE_1                           0x7c
#define QSERDES_UFS_V6_TX_FR_DCC_CTRL                           0x108

#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2           0x08
#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4           0x10
#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_SO_GAIN_RATE4           0x24
#define QSERDES_UFS_V6_RX_UCDR_SO_SATURATION                    0x28
#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_COUNT_HIGH_RATE4        0x54
#define QSERDES_UFS_V6_RX_UCDR_PI_CTRL1                         0x58
#define QSERDES_UFS_V6_RX_RX_TERM_BW_CTRL0                      0xc4
#define QSERDES_UFS_V6_RX_UCDR_FO_GAIN_RATE2                    0xd4
#define QSERDES_UFS_V6_RX_UCDR_FO_GAIN_RATE4                    0xdc
#define QSERDES_UFS_V6_RX_UCDR_SO_GAIN_RATE4                    0xf0
#define QSERDES_UFS_V6_RX_UCDR_PI_CONTROLS                      0xf4
#define QSERDES_UFS_V6_RX_VGA_CAL_MAN_VAL                       0x178
#define QSERDES_UFS_V6_RX_RX_EQU_ADAPTOR_CNTRL4                 0x1ac
#define QSERDES_UFS_V6_RX_EQ_OFFSET_ADAPTOR_CNTRL1              0x1bc
#define QSERDES_UFS_V6_RX_INTERFACE_MODE                        0x1e0
#define QSERDES_UFS_V6_RX_OFFSET_ADAPTOR_CNTRL3                 0x1c4
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B0                      0x208
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B1                      0x20c
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B2                      0x210
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B3                      0x214
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B4                      0x218
#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B6                      0x220
#define QSERDES_UFS_V6_RX_MODE_RATE2_B3                         0x238
#define QSERDES_UFS_V6_RX_MODE_RATE2_B6                         0x244
#define QSERDES_UFS_V6_RX_MODE_RATE3_B3                         0x25c
#define QSERDES_UFS_V6_RX_MODE_RATE3_B4                         0x260
#define QSERDES_UFS_V6_RX_MODE_RATE3_B5                         0x264
#define QSERDES_UFS_V6_RX_MODE_RATE3_B8                         0x270
#define QSERDES_UFS_V6_RX_MODE_RATE4_B0                         0x274
#define QSERDES_UFS_V6_RX_MODE_RATE4_B1                         0x278
#define QSERDES_UFS_V6_RX_MODE_RATE4_B2                         0x27c
#define QSERDES_UFS_V6_RX_MODE_RATE4_B3                         0x280
#define QSERDES_UFS_V6_RX_MODE_RATE4_B4                         0x284
#define QSERDES_UFS_V6_RX_MODE_RATE4_B6                         0x28c
#define QSERDES_UFS_V6_RX_DLL0_FTUNE_CTRL                       0x2f8

#endif