root/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v7.h
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2024, Linaro Limited
 */

#ifndef QCOM_PHY_QMP_QSERDES_TXRX_UFS_V7_H_
#define QCOM_PHY_QMP_QSERDES_TXRX_UFS_V7_H_

#define QSERDES_UFS_V7_TX_RES_CODE_LANE_TX                              0x28
#define QSERDES_UFS_V7_TX_RES_CODE_LANE_RX                              0x2c
#define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_TX                       0x30
#define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_RX                       0x34
#define QSERDES_UFS_V7_TX_LANE_MODE_1                                   0x7c
#define QSERDES_UFS_V7_TX_FR_DCC_CTRL                                   0x108

#define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_FO_GAIN_RATE4                   0x10
#define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_SO_GAIN_RATE4                   0x24
#define QSERDES_UFS_V7_RX_UCDR_SO_SATURATION                            0x28
#define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_COUNT_HIGH_RATE4                0x54
#define QSERDES_UFS_V7_RX_UCDR_PI_CTRL1                                 0x58
#define QSERDES_UFS_V7_RX_TERM_BW_CTRL0                                 0xc4
#define QSERDES_UFS_V7_RX_UCDR_FO_GAIN_RATE2                            0xd4
#define QSERDES_UFS_V7_RX_UCDR_FO_GAIN_RATE4                            0xdc
#define QSERDES_UFS_V7_RX_UCDR_SO_GAIN_RATE4                            0xf0
#define QSERDES_UFS_V7_RX_UCDR_PI_CONTROLS                              0xf4
#define QSERDES_UFS_V7_RX_VGA_CAL_MAN_VAL                               0x178
#define QSERDES_UFS_V7_RX_EQU_ADAPTOR_CNTRL4                            0x1b4
#define QSERDES_UFS_V7_RX_EQ_OFFSET_ADAPTOR_CNTRL1                      0x1cc
#define QSERDES_UFS_V7_RX_OFFSET_ADAPTOR_CNTRL3                         0x1d4
#define QSERDES_UFS_V7_RX_INTERFACE_MODE                                0x1f0
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B0                              0x218
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B1                              0x21C
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B2                              0x220
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B3                              0x224
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B4                              0x228
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B6                              0x230
#define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B7                              0x234
#define QSERDES_UFS_V7_RX_MODE_RATE2_B3                                 0x248
#define QSERDES_UFS_V7_RX_MODE_RATE2_B6                                 0x254
#define QSERDES_UFS_V7_RX_MODE_RATE2_B7                                 0x258
#define QSERDES_UFS_V7_RX_MODE_RATE3_B0                                 0x260
#define QSERDES_UFS_V7_RX_MODE_RATE3_B1                                 0x264
#define QSERDES_UFS_V7_RX_MODE_RATE3_B2                                 0x268
#define QSERDES_UFS_V7_RX_MODE_RATE3_B3                                 0x26c
#define QSERDES_UFS_V7_RX_MODE_RATE3_B4                                 0x270
#define QSERDES_UFS_V7_RX_MODE_RATE3_B5                                 0x274
#define QSERDES_UFS_V7_RX_MODE_RATE3_B7                                 0x27c
#define QSERDES_UFS_V7_RX_MODE_RATE3_B8                                 0x280
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B0                              0x284
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B1                              0x288
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B2                              0x28c
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B3                              0x290
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B4                              0x294
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B5                              0x298
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B6                              0x29c
#define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B7                              0x2a0
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B0                              0x2a8
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B1                              0x2ac
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B2                              0x2b0
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B3                              0x2b4
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B4                              0x2b8
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B5                              0x2bc
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B6                              0x2c0
#define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B7                              0x2c4
#define QSERDES_UFS_V7_RX_DLL0_FTUNE_CTRL                               0x348
#define QSERDES_UFS_V7_RX_SIGDET_CAL_TRIM                               0x380
#endif