// SPDX-License-Identifier: GPL-2.0
/*
 * Allwinner H616 SoC pinctrl driver.
 *
 * Copyright (C) 2020 Arm Ltd.
 * based on the H6 pinctrl driver
 *   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
 */

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-sunxi.h"

static const struct sunxi_desc_pin h616_pins[] = {
        /* Internally connected to the AC200 part in the H616 SoC */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ERXD1 */
                  SUNXI_FUNCTION(0x4, "i2c0"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PA_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ERXD0 */
                  SUNXI_FUNCTION(0x4, "i2c0"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PA_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ECRS_DV */
                  SUNXI_FUNCTION(0x4, "i2c1"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PA_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ERXERR */
                  SUNXI_FUNCTION(0x4, "i2c1"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PA_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ETXD1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PA_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ETXD0 */
                  SUNXI_FUNCTION(0x3, "i2s0"),          /* DOUT0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PA_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ETXCK */
                  SUNXI_FUNCTION(0x3, "i2s0"),          /* MCLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PA_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* ETXEN */
                  SUNXI_FUNCTION(0x3, "i2s0"),          /* BCLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PA_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* EMDC */
                  SUNXI_FUNCTION(0x3, "i2s0"),          /* LRCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PA_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac1"),         /* EMDIO */
                  SUNXI_FUNCTION(0x3, "i2s0"),          /* DIN0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PA_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2c3"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2c3"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "pwm5"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* WE */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* DS */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),  /* PC_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* ALE */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* RST */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),  /* PC_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* CLE */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* MOSI */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),  /* PC_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* CE1 */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* CS0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),  /* PC_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* CE0 */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* MISO */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),  /* PC_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* RE */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),  /* PC_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* RB0 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* CMD */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),  /* PC_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* RB1 */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* CS1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),  /* PC_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ7 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D3 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),  /* PC_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ6 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D4 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),  /* PC_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ5 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PC_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ4 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D5 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PC_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQS */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PC_EINT12 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ3 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PC_EINT13 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ2 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D6 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 14)), /* PC_EINT14 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ1 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D2 */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* WP */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)), /* PC_EINT15 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "nand0"),         /* DQ0 */
                  SUNXI_FUNCTION(0x3, "mmc2"),          /* D7 */
                  SUNXI_FUNCTION(0x4, "spi0"),          /* HOLD */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)), /* PC_EINT16 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D0 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VP0 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),  /* PD_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D1 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VN0 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* ERR */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),  /* PD_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D2 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VP1 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* SYNC */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),  /* PD_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D3 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VN1 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* DVLD */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),  /* PD_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D4 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VP2 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),  /* PD_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D5 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VN2 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),  /* PD_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D6 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VPC */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D2 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),  /* PD_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D7 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VNC */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D3 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),  /* PD_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D8 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VP3 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D4 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),  /* PD_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D9 */
                  SUNXI_FUNCTION(0x3, "lvds0"),         /* VN3 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D5 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),  /* PD_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D10 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VP0 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D6 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PD_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D11 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VN0 */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D7 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PD_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D12 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VP1 */
                  SUNXI_FUNCTION(0x4, "sim"),           /* VPPEN */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PD_EINT12 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D13 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VN1 */
                  SUNXI_FUNCTION(0x4, "sim"),           /* VPPPP */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PD_EINT13 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D14 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VP2 */
                  SUNXI_FUNCTION(0x4, "sim"),           /* PWREN */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* PD_EINT14 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D15 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VN2 */
                  SUNXI_FUNCTION(0x4, "sim"),           /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), /* PD_EINT15 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D16 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VPC */
                  SUNXI_FUNCTION(0x4, "sim"),           /* DATA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), /* PD_EINT16 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D17 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VNC */
                  SUNXI_FUNCTION(0x4, "sim"),           /* RST */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)), /* PD_EINT17 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D18 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VP3 */
                  SUNXI_FUNCTION(0x4, "sim"),           /* DET */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)), /* PD_EINT18 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D19 */
                  SUNXI_FUNCTION(0x3, "lvds1"),         /* VN3 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)), /* PD_EINT19 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D20 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)), /* PD_EINT20 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D21 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)), /* PD_EINT21 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D22 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)), /* PD_EINT22 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* D23 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)), /* PD_EINT23 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)), /* PD_EINT24 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* DE */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)), /* PD_EINT25 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* HSYNC */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)), /* PD_EINT26 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "lcd0"),          /* VSYNC */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)), /* PD_EINT27 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "pwm0"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)), /* PD_EINT28 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  PCLK  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),  /* PE_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  MCLK  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),  /* PE_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  HSYNC  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),  /* PE_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  VSYNC  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),  /* PE_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D0  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),  /* PE_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D1  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),  /* PE_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D2  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),  /* PE_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D3  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),  /* PE_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D4  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),  /* PE_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D5  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),  /* PE_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D6  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), /* PE_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D7  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)), /* PE_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D8  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)), /* PE_EINT12 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D9  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)), /* PE_EINT13 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D10  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)), /* PE_EINT14 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D11  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)), /* PE_EINT15 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D12  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)), /* PE_EINT16 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D13  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)), /* PE_EINT17 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D14  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)), /* PE_EINT18 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  D15  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)), /* PE_EINT19 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  SCK  */
                  SUNXI_FUNCTION(0x5, "i2c2"),          /*  SCK  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)), /* PE_EINT20 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  SDA */
                  SUNXI_FUNCTION(0x5, "i2c2"),          /*  SDA  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)), /* PE_EINT21 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /*  FSIN0 */
                  SUNXI_FUNCTION(0x4, "tcon0"),         /*  TRIG0  */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)), /* PE_EINT22 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
                  SUNXI_FUNCTION(0x3, "jtag"),          /* MS */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 0)),  /* PF_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
                  SUNXI_FUNCTION(0x3, "jtag"),          /* DI */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 1)),  /* PF_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
                  SUNXI_FUNCTION(0x3, "uart0"),         /* TX */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 2)),  /* PF_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
                  SUNXI_FUNCTION(0x3, "jtag"),          /* DO */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 3)),  /* PF_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
                  SUNXI_FUNCTION(0x3, "uart0"),         /* RX */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 4)),  /* PF_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
                  SUNXI_FUNCTION(0x3, "jtag"),          /* CK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 5)),  /* PF_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 6)),  /* PF_EINT6 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* CLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 0)),  /* PG_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* CMD */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 1)),  /* PG_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* D0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 2)),  /* PG_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* D1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 3)),  /* PG_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* D2 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 4)),  /* PG_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "mmc1"),          /* D3 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 5)),  /* PG_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart1"),         /* TX */
                  SUNXI_FUNCTION(0x4, "jtag"),          /* MS */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 6)),  /* PG_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart1"),         /* RX */
                  SUNXI_FUNCTION(0x4, "jtag"),          /* CK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 7)),  /* PG_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart1"),         /* RTS */
                  SUNXI_FUNCTION(0x3, "clock"),         /* PLL_LOCK_DEBUG */
                  SUNXI_FUNCTION(0x4, "jtag"),          /* DO */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 8)),  /* PG_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart1"),         /* CTS */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 9)),  /* PG_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2s2"),  /* MCLK */
                  SUNXI_FUNCTION(0x3, "clock"),         /* X32KFOUT */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 10)), /* PG_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2s2"),  /* BCLK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 11)), /* PG_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2s2"),  /* SYNC */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 12)), /* PG_EINT12 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2s2"),  /* DOUT */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 13)), /* PG_EINT13 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "i2s2"),  /* DIN */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 14)), /* PG_EINT14 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* TX */
                  SUNXI_FUNCTION(0x5, "i2c4"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 15)), /* PG_EINT15 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* RX */
                  SUNXI_FUNCTION(0x5, "i2c4"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 16)), /* PG_EINT16 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* RTS */
                  SUNXI_FUNCTION(0x5, "i2c3"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 17)), /* PG_EINT17 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* CTS */
                  SUNXI_FUNCTION(0x5, "i2c3"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 18)), /* PG_EINT18 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 19),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x4, "pwm1"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 19)), /* PG_EINT19 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart0"),         /* TX */
                  SUNXI_FUNCTION(0x4, "pwm3"),
                  SUNXI_FUNCTION(0x5, "i2c1"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 0)),  /* PH_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart0"),         /* RX */
                  SUNXI_FUNCTION(0x4, "pwm4"),
                  SUNXI_FUNCTION(0x5, "i2c1"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 1)),  /* PH_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart5"),         /* TX */
                  SUNXI_FUNCTION(0x3, "spdif"),         /* MCLK */
                  SUNXI_FUNCTION(0x4, "pwm2"),
                  SUNXI_FUNCTION(0x5, "i2c2"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 2)),  /* PH_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart5"),         /* RX */
                  SUNXI_FUNCTION(0x4, "pwm1"),
                  SUNXI_FUNCTION(0x5, "i2c2"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 3)),  /* PH_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x3, "spdif"),         /* OUT */
                  SUNXI_FUNCTION(0x5, "i2c3"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 4)),  /* PH_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* TX */
                  SUNXI_FUNCTION(0x3, "i2s3"),  /* MCLK */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* CS0 */
                  SUNXI_FUNCTION(0x5, "i2c3"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 5)),  /* PH_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* RX */
                  SUNXI_FUNCTION(0x3, "i2s3"),  /* BCLK */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* CLK */
                  SUNXI_FUNCTION(0x5, "i2c4"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 6)),  /* PH_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* RTS */
                  SUNXI_FUNCTION(0x3, "i2s3"),  /* SYNC */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* MOSI */
                  SUNXI_FUNCTION(0x5, "i2c4"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 7)),  /* PH_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "uart2"),         /* CTS */
                  SUNXI_FUNCTION(0x3, "i2s3_dout0"),    /* DO0 */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* MISO */
                  SUNXI_FUNCTION(0x5, "i2s3_din1"),     /* DI1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 8)),  /* PH_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x3, "i2s3_din0"),     /* DI0 */
                  SUNXI_FUNCTION(0x4, "spi1"),          /* CS1 */
                  SUNXI_FUNCTION(0x5, "i2s3_dout1"),    /* DO1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 9)),  /* PH_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x3, "ir_rx"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 10)), /* PH_EINT10 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXD3 */
                  SUNXI_FUNCTION(0x3, "dmic"),          /* CLK */
                  SUNXI_FUNCTION(0x4, "i2s0"),  /* MCLK */
                  SUNXI_FUNCTION(0x5, "hdmi"),          /* HSCL */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 0)),  /* PI_EINT0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXD2 */
                  SUNXI_FUNCTION(0x3, "dmic"),          /* DATA0 */
                  SUNXI_FUNCTION(0x4, "i2s0"),  /* BCLK */
                  SUNXI_FUNCTION(0x5, "hdmi"),          /* HSDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 1)),  /* PI_EINT1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXD1 */
                  SUNXI_FUNCTION(0x3, "dmic"),          /* DATA1 */
                  SUNXI_FUNCTION(0x4, "i2s0"),  /* SYNC */
                  SUNXI_FUNCTION(0x5, "hdmi"),          /* HCEC */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 2)),  /* PI_EINT2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXD0 */
                  SUNXI_FUNCTION(0x3, "dmic"),          /* DATA2 */
                  SUNXI_FUNCTION(0x4, "i2s0_dout0"),    /* DO0 */
                  SUNXI_FUNCTION(0x5, "i2s0_din1"),     /* DI1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 3)),  /* PI_EINT3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXCK */
                  SUNXI_FUNCTION(0x3, "dmic"),          /* DATA3 */
                  SUNXI_FUNCTION(0x4, "i2s0_din0"),     /* DI0 */
                  SUNXI_FUNCTION(0x5, "i2s0_dout1"),    /* DO1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 4)),  /* PI_EINT4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ERXCTL */
                  SUNXI_FUNCTION(0x3, "uart2"),         /* TX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* CLK */
                  SUNXI_FUNCTION(0x5, "i2c0"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 5)),  /* PI_EINT5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ENULL */
                  SUNXI_FUNCTION(0x3, "uart2"),         /* RX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* ERR */
                  SUNXI_FUNCTION(0x5, "i2c0"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 6)),  /* PI_EINT6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXD3 */
                  SUNXI_FUNCTION(0x3, "uart2"),         /* RTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* SYNC */
                  SUNXI_FUNCTION(0x5, "i2c1"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 7)),  /* PI_EINT7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXD2 */
                  SUNXI_FUNCTION(0x3, "uart2"),         /* CTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* DVLD */
                  SUNXI_FUNCTION(0x5, "i2c1"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 8)),  /* PI_EINT8 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXD1 */
                  SUNXI_FUNCTION(0x3, "uart3"),         /* TX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D0 */
                  SUNXI_FUNCTION(0x5, "i2c2"),          /* SCK */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 9)),  /* PI_EINT9 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXD0 */
                  SUNXI_FUNCTION(0x3, "uart3"),         /* RX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D1 */
                  SUNXI_FUNCTION(0x5, "i2c2"),          /* SDA */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 10)), /* PI_EINT10 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXCK */
                  SUNXI_FUNCTION(0x3, "uart3"),         /* RTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D2 */
                  SUNXI_FUNCTION(0x5, "pwm1"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 11)), /* PI_EINT11 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ETXCTL */
                  SUNXI_FUNCTION(0x3, "uart3"),         /* CTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D3 */
                  SUNXI_FUNCTION(0x5, "pwm2"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 12)), /* PI_EINT12 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* ECLKIN */
                  SUNXI_FUNCTION(0x3, "uart4"),         /* TX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D4 */
                  SUNXI_FUNCTION(0x5, "pwm3"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 13)), /* PI_EINT13 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* MDC */
                  SUNXI_FUNCTION(0x3, "uart4"),         /* RX */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D5 */
                  SUNXI_FUNCTION(0x5, "pwm4"),
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 14)), /* PI_EINT14 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* MDIO */
                  SUNXI_FUNCTION(0x3, "uart4"),         /* RTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D6 */
                  SUNXI_FUNCTION(0x5, "clock"),         /* CLK_FANOUT0 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 15)), /* PI_EINT15 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "emac0"),         /* EPHY_CLK */
                  SUNXI_FUNCTION(0x3, "uart4"),         /* CTS */
                  SUNXI_FUNCTION(0x4, "ts0"),           /* D7 */
                  SUNXI_FUNCTION(0x5, "clock"),         /* CLK_FANOUT1 */
                  SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 16)), /* PI_EINT16 */
};
static const unsigned int h616_irq_bank_map[] = { 0, 2, 3, 4, 5, 6, 7, 8 };

static const struct sunxi_pinctrl_desc h616_pinctrl_data = {
        .pins = h616_pins,
        .npins = ARRAY_SIZE(h616_pins),
        .irq_banks = ARRAY_SIZE(h616_irq_bank_map),
        .irq_bank_map = h616_irq_bank_map,
        .irq_read_needs_mux = true,
        .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_CTL,
};

static int h616_pinctrl_probe(struct platform_device *pdev)
{
        return sunxi_pinctrl_init(pdev, &h616_pinctrl_data);
}

static const struct of_device_id h616_pinctrl_match[] = {
        { .compatible = "allwinner,sun50i-h616-pinctrl", },
        {}
};

static struct platform_driver h616_pinctrl_driver = {
        .probe  = h616_pinctrl_probe,
        .driver = {
                .name           = "sun50i-h616-pinctrl",
                .of_match_table = h616_pinctrl_match,
        },
};
builtin_platform_driver(h616_pinctrl_driver);