#ifndef _UAPI_ASM_PARISC_PERF_REGS_H
#define _UAPI_ASM_PARISC_PERF_REGS_H
enum perf_event_parisc_regs {
PERF_REG_PARISC_R0,
PERF_REG_PARISC_R1,
PERF_REG_PARISC_R2,
PERF_REG_PARISC_R3,
PERF_REG_PARISC_R4,
PERF_REG_PARISC_R5,
PERF_REG_PARISC_R6,
PERF_REG_PARISC_R7,
PERF_REG_PARISC_R8,
PERF_REG_PARISC_R9,
PERF_REG_PARISC_R10,
PERF_REG_PARISC_R11,
PERF_REG_PARISC_R12,
PERF_REG_PARISC_R13,
PERF_REG_PARISC_R14,
PERF_REG_PARISC_R15,
PERF_REG_PARISC_R16,
PERF_REG_PARISC_R17,
PERF_REG_PARISC_R18,
PERF_REG_PARISC_R19,
PERF_REG_PARISC_R20,
PERF_REG_PARISC_R21,
PERF_REG_PARISC_R22,
PERF_REG_PARISC_R23,
PERF_REG_PARISC_R24,
PERF_REG_PARISC_R25,
PERF_REG_PARISC_R26,
PERF_REG_PARISC_R27,
PERF_REG_PARISC_R28,
PERF_REG_PARISC_R29,
PERF_REG_PARISC_R30,
PERF_REG_PARISC_R31,
PERF_REG_PARISC_SR0,
PERF_REG_PARISC_SR1,
PERF_REG_PARISC_SR2,
PERF_REG_PARISC_SR3,
PERF_REG_PARISC_SR4,
PERF_REG_PARISC_SR5,
PERF_REG_PARISC_SR6,
PERF_REG_PARISC_SR7,
PERF_REG_PARISC_IAOQ0,
PERF_REG_PARISC_IAOQ1,
PERF_REG_PARISC_IASQ0,
PERF_REG_PARISC_IASQ1,
PERF_REG_PARISC_SAR,
PERF_REG_PARISC_IIR,
PERF_REG_PARISC_ISR,
PERF_REG_PARISC_IOR,
PERF_REG_PARISC_IPSW,
PERF_REG_PARISC_MAX
};
#endif