arch/x86/boot/startup/sme.c

58

(_PAGE_PAT_LARGE | _PAGE_PWT))

arch/x86/boot/startup/sme.c

66

(_PAGE_PAT | _PAGE_PWT))

arch/x86/include/asm/pgtable_64_types.h

196

#define _PAGE_SWP_EXCLUSIVE _PAGE_PWT

arch/x86/include/asm/pgtable_types.h

151

#define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \

arch/x86/include/asm/pgtable_types.h

182

#define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)

arch/x86/include/asm/pgtable_types.h

183

#define _PAGE_LARGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE)

arch/x86/include/asm/pgtable_types.h

318

_PAGE_PWT | _PAGE_PCD | \

arch/x86/include/asm/tlbflush.h

375

const pteval_t flush_on_change = _PAGE_RW | _PAGE_USER | _PAGE_PWT |

arch/x86/mm/dump_pagetables.c

196

if (pr & _PAGE_PWT)

arch/x86/mm/init.c

59

[_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,

arch/x86/mm/init.c

74

[__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,

arch/x86/mm/init.c

76

[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,

arch/x86/mm/init.c

78

[__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,

arch/x86/mm/init.c

80

[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,

drivers/gpu/drm/i915/gt/intel_gtt.h

135

#define PPAT_UNCACHED (_PAGE_PWT | _PAGE_PCD)