arch/arm/mach-lpc32xx/lpc32xx.h

175

#define LPC32XX_CLKPWR_VFP_CLOCK_ENABLE_BIT _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

180

#define LPC32XX_CLKPWR_BOOTMAP_SEL_BIT _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

185

#define LPC32XX_CLKPWR_GPIOSRC_P1IO23_BIT _BIT(31)

arch/arm/mach-lpc32xx/lpc32xx.h

186

#define LPC32XX_CLKPWR_GPIOSRC_P1IO22_BIT _BIT(30)

arch/arm/mach-lpc32xx/lpc32xx.h

187

#define LPC32XX_CLKPWR_GPIOSRC_P1IO21_BIT _BIT(29)

arch/arm/mach-lpc32xx/lpc32xx.h

188

#define LPC32XX_CLKPWR_GPIOSRC_P1IO20_BIT _BIT(28)

arch/arm/mach-lpc32xx/lpc32xx.h

189

#define LPC32XX_CLKPWR_GPIOSRC_P1IO19_BIT _BIT(27)

arch/arm/mach-lpc32xx/lpc32xx.h

190

#define LPC32XX_CLKPWR_GPIOSRC_P1IO18_BIT _BIT(26)

arch/arm/mach-lpc32xx/lpc32xx.h

191

#define LPC32XX_CLKPWR_GPIOSRC_P1IO17_BIT _BIT(25)

arch/arm/mach-lpc32xx/lpc32xx.h

192

#define LPC32XX_CLKPWR_GPIOSRC_P1IO16_BIT _BIT(24)

arch/arm/mach-lpc32xx/lpc32xx.h

193

#define LPC32XX_CLKPWR_GPIOSRC_P1IO15_BIT _BIT(23)

arch/arm/mach-lpc32xx/lpc32xx.h

194

#define LPC32XX_CLKPWR_GPIOSRC_P1IO14_BIT _BIT(22)

arch/arm/mach-lpc32xx/lpc32xx.h

195

#define LPC32XX_CLKPWR_GPIOSRC_P1IO13_BIT _BIT(21)

arch/arm/mach-lpc32xx/lpc32xx.h

196

#define LPC32XX_CLKPWR_GPIOSRC_P1IO12_BIT _BIT(20)

arch/arm/mach-lpc32xx/lpc32xx.h

197

#define LPC32XX_CLKPWR_GPIOSRC_P1IO11_BIT _BIT(19)

arch/arm/mach-lpc32xx/lpc32xx.h

198

#define LPC32XX_CLKPWR_GPIOSRC_P1IO10_BIT _BIT(18)

arch/arm/mach-lpc32xx/lpc32xx.h

199

#define LPC32XX_CLKPWR_GPIOSRC_P1IO9_BIT _BIT(17)

arch/arm/mach-lpc32xx/lpc32xx.h

200

#define LPC32XX_CLKPWR_GPIOSRC_P1IO8_BIT _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

201

#define LPC32XX_CLKPWR_GPIOSRC_P1IO7_BIT _BIT(15)

arch/arm/mach-lpc32xx/lpc32xx.h

202

#define LPC32XX_CLKPWR_GPIOSRC_P1IO6_BIT _BIT(14)

arch/arm/mach-lpc32xx/lpc32xx.h

203

#define LPC32XX_CLKPWR_GPIOSRC_P1IO5_BIT _BIT(13)

arch/arm/mach-lpc32xx/lpc32xx.h

204

#define LPC32XX_CLKPWR_GPIOSRC_P1IO4_BIT _BIT(12)

arch/arm/mach-lpc32xx/lpc32xx.h

205

#define LPC32XX_CLKPWR_GPIOSRC_P1IO3_BIT _BIT(11)

arch/arm/mach-lpc32xx/lpc32xx.h

206

#define LPC32XX_CLKPWR_GPIOSRC_P1IO2_BIT _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

207

#define LPC32XX_CLKPWR_GPIOSRC_P1IO1_BIT _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

208

#define LPC32XX_CLKPWR_GPIOSRC_P1IO0_BIT _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

209

#define LPC32XX_CLKPWR_GPIOSRC_P0IO7_BIT _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

210

#define LPC32XX_CLKPWR_GPIOSRC_P0IO6_BIT _BIT(6)

arch/arm/mach-lpc32xx/lpc32xx.h

211

#define LPC32XX_CLKPWR_GPIOSRC_P0IO5_BIT _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

212

#define LPC32XX_CLKPWR_GPIOSRC_P0IO4_BIT _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

213

#define LPC32XX_CLKPWR_GPIOSRC_P0IO3_BIT _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

214

#define LPC32XX_CLKPWR_GPIOSRC_P0IO2_BIT _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

215

#define LPC32XX_CLKPWR_GPIOSRC_P0IO1_BIT _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

216

#define LPC32XX_CLKPWR_GPIOSRC_P0IO0_BIT _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

227

#define LPC32XX_CLKPWR_INTSRC_ADC_BIT _BIT(31)

arch/arm/mach-lpc32xx/lpc32xx.h

228

#define LPC32XX_CLKPWR_INTSRC_TS_P_BIT _BIT(30)

arch/arm/mach-lpc32xx/lpc32xx.h

229

#define LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT _BIT(29)

arch/arm/mach-lpc32xx/lpc32xx.h

230

#define LPC32XX_CLKPWR_INTSRC_USBAHNEEDCLK_BIT _BIT(26)

arch/arm/mach-lpc32xx/lpc32xx.h

231

#define LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT _BIT(25)

arch/arm/mach-lpc32xx/lpc32xx.h

232

#define LPC32XX_CLKPWR_INTSRC_RTC_BIT _BIT(24)

arch/arm/mach-lpc32xx/lpc32xx.h

233

#define LPC32XX_CLKPWR_INTSRC_USBNEEDCLK_BIT _BIT(23)

arch/arm/mach-lpc32xx/lpc32xx.h

234

#define LPC32XX_CLKPWR_INTSRC_USB_BIT _BIT(22)

arch/arm/mach-lpc32xx/lpc32xx.h

235

#define LPC32XX_CLKPWR_INTSRC_I2C_BIT _BIT(21)

arch/arm/mach-lpc32xx/lpc32xx.h

236

#define LPC32XX_CLKPWR_INTSRC_USBOTGTIMER_BIT _BIT(20)

arch/arm/mach-lpc32xx/lpc32xx.h

237

#define LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT _BIT(19)

arch/arm/mach-lpc32xx/lpc32xx.h

238

#define LPC32XX_CLKPWR_INTSRC_KEY_BIT _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

239

#define LPC32XX_CLKPWR_INTSRC_MAC_BIT _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

240

#define LPC32XX_CLKPWR_INTSRC_P0P1_BIT _BIT(6)

arch/arm/mach-lpc32xx/lpc32xx.h

241

#define LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

242

#define LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

243

#define LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

244

#define LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

245

#define LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

246

#define LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

252

#define LPC32XX_CLKPWR_EXTSRC_U7_RX_BIT _BIT(31)

arch/arm/mach-lpc32xx/lpc32xx.h

253

#define LPC32XX_CLKPWR_EXTSRC_U7_HCTS_BIT _BIT(30)

arch/arm/mach-lpc32xx/lpc32xx.h

254

#define LPC32XX_CLKPWR_EXTSRC_U6_IRRX_BIT _BIT(28)

arch/arm/mach-lpc32xx/lpc32xx.h

255

#define LPC32XX_CLKPWR_EXTSRC_U5_RX_BIT _BIT(26)

arch/arm/mach-lpc32xx/lpc32xx.h

256

#define LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT _BIT(25)

arch/arm/mach-lpc32xx/lpc32xx.h

257

#define LPC32XX_CLKPWR_EXTSRC_U3_RX_BIT _BIT(24)

arch/arm/mach-lpc32xx/lpc32xx.h

258

#define LPC32XX_CLKPWR_EXTSRC_U2_HCTS_BIT _BIT(23)

arch/arm/mach-lpc32xx/lpc32xx.h

259

#define LPC32XX_CLKPWR_EXTSRC_U2_RX_BIT _BIT(22)

arch/arm/mach-lpc32xx/lpc32xx.h

260

#define LPC32XX_CLKPWR_EXTSRC_U1_RX_BIT _BIT(21)

arch/arm/mach-lpc32xx/lpc32xx.h

261

#define LPC32XX_CLKPWR_EXTSRC_MSDIO_INT_BIT _BIT(18)

arch/arm/mach-lpc32xx/lpc32xx.h

262

#define LPC32XX_CLKPWR_EXTSRC_MSDIO_SRT_BIT _BIT(17)

arch/arm/mach-lpc32xx/lpc32xx.h

263

#define LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

264

#define LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT _BIT(15)

arch/arm/mach-lpc32xx/lpc32xx.h

265

#define LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT _BIT(14)

arch/arm/mach-lpc32xx/lpc32xx.h

266

#define LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT _BIT(13)

arch/arm/mach-lpc32xx/lpc32xx.h

267

#define LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT _BIT(12)

arch/arm/mach-lpc32xx/lpc32xx.h

268

#define LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT _BIT(11)

arch/arm/mach-lpc32xx/lpc32xx.h

269

#define LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

270

#define LPC32XX_CLKPWR_EXTSRC_SYSCLKEN_BIT _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

271

#define LPC32XX_CLKPWR_EXTSRC_SPI1_DATIN_BIT _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

272

#define LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

273

#define LPC32XX_CLKPWR_EXTSRC_SPI2_DATIN_BIT _BIT(6)

arch/arm/mach-lpc32xx/lpc32xx.h

274

#define LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

275

#define LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

276

#define LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

290

#define LPC32XX_CLKPWR_CTRL_FORCE_PCLK _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

291

#define LPC32XX_CLKPWR_SDRAM_SELF_RFSH _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

292

#define LPC32XX_CLKPWR_UPD_SDRAM_SELF_RFSH _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

293

#define LPC32XX_CLKPWR_AUTO_SDRAM_SELF_RFSH _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

294

#define LPC32XX_CLKPWR_HIGHCORE_STATE_BIT _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

295

#define LPC32XX_CLKPWR_SYSCLKEN_STATE_BIT _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

296

#define LPC32XX_CLKPWR_SYSCLKEN_GPIO_EN _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

297

#define LPC32XX_CLKPWR_SELECT_RUN_MODE _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

298

#define LPC32XX_CLKPWR_HIGHCORE_GPIO_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

299

#define LPC32XX_CLKPWR_STOP_MODE_CTRL _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

304

#define LPC32XX_CLKPWR_PLL397_MSLOCK_STS _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

305

#define LPC32XX_CLKPWR_PLL397_BYPASS _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

315

#define LPC32XX_CLKPWR_SYSCTRL_PLL397_DIS _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

316

#define LPC32XX_CLKPWR_SYSCTRL_PLL397_STS _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

323

#define LPC32XX_CLKPWR_TEST_MODE _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

324

#define LPC32XX_CLKPWR_MOSC_DISABLE _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

331

#define LPC32XX_CLKPWR_SYSCTRL_USEPLL397 _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

332

#define LPC32XX_CLKPWR_SYSCTRL_SYSCLKMUX _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

353

#define LPC32XX_CLKPWR_HCLKPLL_POWER_UP _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

354

#define LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS _BIT(15)

arch/arm/mach-lpc32xx/lpc32xx.h

355

#define LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS _BIT(14)

arch/arm/mach-lpc32xx/lpc32xx.h

356

#define LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK _BIT(13)

arch/arm/mach-lpc32xx/lpc32xx.h

360

#define LPC32XX_CLKPWR_HCLKPLL_PLL_STS _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

366

#define LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

371

#define LPC32XX_CLKPWR_USBCTRL_HCLK_EN _BIT(24)

arch/arm/mach-lpc32xx/lpc32xx.h

372

#define LPC32XX_CLKPWR_USBCTRL_USBI2C_EN _BIT(23)

arch/arm/mach-lpc32xx/lpc32xx.h

373

#define LPC32XX_CLKPWR_USBCTRL_USBDVND_EN _BIT(22)

arch/arm/mach-lpc32xx/lpc32xx.h

374

#define LPC32XX_CLKPWR_USBCTRL_USBHSTND_EN _BIT(21)

arch/arm/mach-lpc32xx/lpc32xx.h

378

#define LPC32XX_CLKPWR_USBCTRL_CLK_EN2 _BIT(18)

arch/arm/mach-lpc32xx/lpc32xx.h

379

#define LPC32XX_CLKPWR_USBCTRL_CLK_EN1 _BIT(17)

arch/arm/mach-lpc32xx/lpc32xx.h

380

#define LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

381

#define LPC32XX_CLKPWR_USBCTRL_CCO_BYPASS _BIT(15)

arch/arm/mach-lpc32xx/lpc32xx.h

382

#define LPC32XX_CLKPWR_USBCTRL_POSTDIV_BYPASS _BIT(14)

arch/arm/mach-lpc32xx/lpc32xx.h

383

#define LPC32XX_CLKPWR_USBCTRL_FDBK_SEL_FCLK _BIT(13)

arch/arm/mach-lpc32xx/lpc32xx.h

387

#define LPC32XX_CLKPWR_USBCTRL_PLL_STS _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

392

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_CLK _BIT(22)

arch/arm/mach-lpc32xx/lpc32xx.h

393

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW _BIT(21)

arch/arm/mach-lpc32xx/lpc32xx.h

394

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_DAT _BIT(20)

arch/arm/mach-lpc32xx/lpc32xx.h

395

#define LPC32XX_CLKPWR_SDRCLK_SW_DDR_RESET _BIT(19)

arch/arm/mach-lpc32xx/lpc32xx.h

397

#define LPC32XX_CLKPWR_SDRCLK_DLY_ADDR_STS _BIT(13)

arch/arm/mach-lpc32xx/lpc32xx.h

399

#define LPC32XX_CLKPWR_SDRCLK_USE_CAL _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

400

#define LPC32XX_CLKPWR_SDRCLK_DO_CAL _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

401

#define LPC32XX_CLKPWR_SDRCLK_CAL_ON_RTC _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

403

#define LPC32XX_CLKPWR_SDRCLK_USE_DDR _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

404

#define LPC32XX_CLKPWR_SDRCLK_CLK_DIS _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

409

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1RX _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

410

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1TX _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

411

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0RX _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

412

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0TX _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

413

#define LPC32XX_CLKPWR_SSPCTRL_SSPCLK1_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

414

#define LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

419

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_RX_FOR_TX _BIT(6)

arch/arm/mach-lpc32xx/lpc32xx.h

420

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_TX_FOR_RX _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

421

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

422

#define LPC32XX_CLKPWR_I2SCTRL_I2S0_RX_FOR_TX _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

423

#define LPC32XX_CLKPWR_I2SCTRL_I2S0_TX_FOR_RX _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

424

#define LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

425

#define LPC32XX_CLKPWR_I2SCTRL_I2SCLK0_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

430

#define LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

431

#define LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

432

#define LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS _BIT(8)

arch/arm/mach-lpc32xx/lpc32xx.h

433

#define LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS _BIT(7)

arch/arm/mach-lpc32xx/lpc32xx.h

434

#define LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS _BIT(6)

arch/arm/mach-lpc32xx/lpc32xx.h

435

#define LPC32XX_CLKPWR_MSCARD_SDCARD_EN _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

445

#define LPC32XX_CLKPWR_MACCTRL_DMACLK_EN _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

446

#define LPC32XX_CLKPWR_MACCTRL_MMIOCLK_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

447

#define LPC32XX_CLKPWR_MACCTRL_HRCCLK_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

456

#define LPC32XX_CLKPWR_TESTCLK_TESTCLK1_EN _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

463

#define LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

468

#define LPC32XX_CLKPWR_SW_INT(n) (_BIT(0) | (((n) & 0x7F) << 1))

arch/arm/mach-lpc32xx/lpc32xx.h

474

#define LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

475

#define LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

476

#define LPC32XX_CLKPWR_I2CCLK_I2C1HI_DRIVE _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

477

#define LPC32XX_CLKPWR_I2CCLK_I2C2CLK_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

478

#define LPC32XX_CLKPWR_I2CCLK_I2C1CLK_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

545

#define LPC32XX_CLKPWR_UART_USE_HCLK _BIT(16)

arch/arm/mach-lpc32xx/lpc32xx.h

556

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART6_EN _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

557

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART5_EN _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

558

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART4_EN _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

559

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART3_EN _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

647

#define LPC32XX_UART_U3_MD_CTRL_EN _BIT(11)

arch/arm/mach-lpc32xx/lpc32xx.h

648

#define LPC32XX_UART_IRRX6_INV_EN _BIT(10)

arch/arm/mach-lpc32xx/lpc32xx.h

649

#define LPC32XX_UART_HDPX_EN _BIT(9)

arch/arm/mach-lpc32xx/lpc32xx.h

650

#define LPC32XX_UART_UART6_IRDAMOD_BYPASS _BIT(5)

arch/arm/mach-lpc32xx/lpc32xx.h

651

#define LPC32XX_RT_IRTX6_INV_EN _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

652

#define LPC32XX_RT_IRTX6_INV_MIR_EN _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

653

#define LPC32XX_RT_RX_IRPULSE_3_16_115K _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

654

#define LPC32XX_RT_TX_IRPULSE_3_16_115K _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

655

#define LPC32XX_UART_U5_ROUTE_TO_USB _BIT(0)

arch/arm/mach-lpc32xx/lpc32xx.h

662

#define LPC32XX_UART_ENABLED_CLKS_ANY _BIT(14)

arch/arm/mach-lpc32xx/lpc32xx.h

697

#define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)

arch/arm/mach-lpc32xx/lpc32xx.h

698

#define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)

arch/arm/mach-lpc32xx/lpc32xx.h

699

#define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)

arch/arm/mach-lpc32xx/lpc32xx.h

700

#define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)

arch/arm/mach-lpc32xx/lpc32xx.h

701

#define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)

arch/arm64/kernel/cpufeature.c

3082

ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, TGRAN4, 52_BIT)

arch/arm64/kernel/cpufeature.c

3084

ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, TGRAN16, 52_BIT)

arch/arm64/kvm/at.c

47

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT))

arch/arm64/kvm/at.c

51

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT))

arch/arm64/kvm/config.c

363

return ((kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT) ||

arch/arm64/kvm/config.c

365

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT) ||

arch/arm64/kvm/config.c

367

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4_2, 52_BIT) ||

arch/arm64/kvm/config.c

369

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16_2, 52_BIT) ||

arch/x86/coco/tdx/debug.c

10

#define DEF_TDX_ATTR_NAME(_name) [TDX_ATTR_##_name##_BIT] = __stringify(_name)

arch/x86/coco/tdx/debug.c

27

#define DEF_TD_CTLS_NAME(_name) [TD_CTLS_##_name##_BIT] = __stringify(_name)

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

1735

[SMU_FEATURE_##fea##_BIT] = {1, FEATURE_##fea##_BIT}

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

1738

[SMU_FEATURE_DPM_##fea##_BIT] = {1, FEATURE_##fea##_DPM_BIT}

drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h

478

#define __SMU_DUMMY_MAP(feature) SMU_FEATURE_##feature##_BIT

drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c

508

__set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \

drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c

644

if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \

drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c

1315

__set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \

drivers/net/ethernet/emulex/benet/be.h

447

#define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT

drivers/net/ethernet/emulex/benet/be.h

448

#define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT)

drivers/net/ethernet/fungible/funeth/funeth_ethtool.c

125

__set_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, ethtool_modes_map)

drivers/net/ethernet/intel/ice/ice_ethtool.h

62

.link_mode = ETHTOOL_LINK_MODE_##ETHTOOL_LINK_MODE##_BIT, \

drivers/net/ethernet/mellanox/mlx5/core/en_tc.h

185

#define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT)

drivers/net/ethernet/netronome/nfp/flower/action.c

403

__set_bit(IP_TUNNEL_##flag##_BIT, __check); \

drivers/net/ethernet/sfc/mcdi_port_common.c

114

#define SET_BIT(name) __set_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \

drivers/net/ethernet/sfc/mcdi_port_common.c

191

#define TEST_BIT(name) test_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \

drivers/net/ethernet/sfc/siena/mcdi_port_common.c

115

#define SET_BIT(name) __set_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \

drivers/net/ethernet/sfc/siena/mcdi_port_common.c

192

#define TEST_BIT(name) test_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \

drivers/net/pcs/pcs-xpcs.c

210

__xpcs_linkmode_supported(compat, ETHTOOL_LINK_MODE_ ## mode ## _BIT)

fs/btrfs/misc.h

27

__ ## name ## _BIT, \

fs/btrfs/misc.h

28

name = (1U << __ ## name ## _BIT), \

fs/btrfs/misc.h

29

__ ## name ## _SEQ = __ ## name ## _BIT

include/linux/ethtool.h

123

#define __ETH_RSS_HASH(name) __ETH_RSS_HASH_BIT(ETH_RSS_HASH_##name##_BIT)

include/linux/ethtool.h

290

__set_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, (ptr)->link_modes.name)

include/linux/ethtool.h

301

__clear_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, (ptr)->link_modes.name)

include/linux/ethtool.h

313

test_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, (ptr)->link_modes.name)

include/linux/mm.h

293

VMA_ ## name ## _BIT = ((__force vma_flag_t)bitnum)

include/linux/mm.h

295

VMA_ ## name ## _BIT = (VMA_ ## aliased ## _BIT)

include/linux/mm.h

401

#define INIT_VM_FLAG(name) BIT((__force int) VMA_ ## name ## _BIT)

include/linux/netdev_features.h

105

#define __NETIF_F(name) __NETIF_F_BIT(NETIF_F_##name##_BIT)

include/linux/netdevice.h

4699

#define __NETIF_MSG(name) __NETIF_MSG_BIT(NETIF_MSG_ ## name ## _BIT)

include/linux/netdevice.h

5123

#define __NESTED_SYNC(name) __NESTED_SYNC_BIT(NESTED_SYNC_ ## name ## _BIT)

include/linux/phylink.h

775

op(ETHTOOL_LINK_MODE_ ## mode ## _BIT, bm)

include/trace/events/mmflags.h

71

#define TRACE_GFP_EM(a) TRACE_DEFINE_ENUM(___GFP_##a##_BIT);

include/uapi/linux/ethtool.h

2103

(1UL << (ETHTOOL_LINK_MODE_ ## base_name ## _BIT))

kernel/trace/trace.h

1451

#define C(a, b) TRACE_ITER_##a##_BIT

kernel/trace/trace.h

1463

(TRACE_ITER_##flag##_BIT < 0 ? 0 : 1ULL << (TRACE_ITER_##flag##_BIT))

net/ethtool/common.c

112

[ETHTOOL_LINK_MODE_ ## _mode ## _BIT] = _name

net/ethtool/common.c

320

[ETHTOOL_LINK_MODE_ ## _mode ## _BIT] = { \

net/ethtool/common.h

13

ETHTOOL_LINK_MODE_ ## speed ## base ## type ## _ ## duplex ## _BIT

tools/testing/vma/include/dup.h

200

#define INIT_VM_FLAG(name) BIT((__force int) VMA_ ## name ## _BIT)

tools/testing/vma/include/dup.h

94

VMA_ ## name ## _BIT = ((__force vma_flag_t)bitnum)

tools/testing/vma/include/dup.h

96

VMA_ ## name ## _BIT = VMA_ ## aliased ## _BIT