BPF_ARSH
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH: /* sign extending arithmetic shift right */
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
case BPF_ALU | BPF_ARSH | BPF_K: /* (s32) dst >>= imm */
case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
case BPF_ALU | BPF_ARSH | BPF_K: /* (s32) dst >>= imm */
case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ARSH:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X: /* ((s32) dst) >>= src */
case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
case BPF_ALU | BPF_ARSH | BPF_K: /* ((s32) dst >> imm */
case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ARSH:
[BPF_ARSH] = 0xF8,
case BPF_ALU | BPF_ARSH | BPF_K:
case BPF_ALU | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_X:
case BPF_ALU64 | BPF_ARSH | BPF_K:
case BPF_ARSH:
[BPF_ALU64 | BPF_ARSH | BPF_X] = ashr_reg64,
[BPF_ALU64 | BPF_ARSH | BPF_K] = ashr_imm64,
[BPF_ALU | BPF_ARSH | BPF_X] = ashr_reg,
[BPF_ALU | BPF_ARSH | BPF_K] = ashr_imm,
[BPF_ARSH >> 4] = "s>>=",
case BPF_ARSH:
case BPF_ARSH:
opcode == BPF_ARSH) && BPF_SRC(insn->code) == BPF_K) {
*patch++ = BPF_ALU64_IMM(BPF_ARSH, BPF_REG_AX, 63);
if (op == BPF_LSH || op == BPF_RSH || op == BPF_ARSH)
return __bpf_fill_alu_imm_regs(self, BPF_ARSH, false);
return __bpf_fill_alu_imm_regs(self, BPF_ARSH, true);
if (op == BPF_LSH || op == BPF_RSH || op == BPF_ARSH)
return __bpf_fill_alu_reg_pairs(self, BPF_ARSH, false);
return __bpf_fill_alu_reg_pairs(self, BPF_ARSH, true);
BPF_ALU64_IMM(BPF_ARSH, R1, 32),
BPF_ALU64_REG(BPF_ARSH, R0, R3),
BPF_LSH, BPF_RSH, BPF_ARSH, BPF_ADD,
case BPF_ARSH:
if (op == BPF_ARSH)
return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, false);
return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, false);
return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, true);
return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, true);
BPF_ALU32_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU64_REG(BPF_ARSH, R0, R1),
BPF_ALU32_IMM(BPF_ARSH, R0, 7),
BPF_ALU32_IMM(BPF_ARSH, R0, 0),
BPF_ALU64_IMM(BPF_ARSH, R0, 40),
BPF_ALU64_IMM(BPF_ARSH, R0, 12),
BPF_ALU64_IMM(BPF_ARSH, R0, 36),
BPF_ALU64_IMM(BPF_ARSH, R0, 36),
BPF_ALU64_IMM(BPF_ARSH, R0, 32),
BPF_ALU64_IMM(BPF_ARSH, R0, 32),
BPF_ALU64_IMM(BPF_ARSH, R0, 0),
return __bpf_fill_alu_shift_same_reg(self, BPF_ARSH, false);
return __bpf_fill_alu_shift_same_reg(self, BPF_ARSH, true);
[BPF_ARSH >> 4] = "s>>=",
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_7, 32)
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_1, 0),
BPF_ALU64_REG(BPF_ARSH, BPF_REG_1, BPF_REG_3),
BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 5),
BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 7),
BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_0, 5),
BPF_ALU64_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_1, 1),
BPF_ALU64_REG(BPF_ARSH, BPF_REG_4, BPF_REG_4),