A14
ASPEED_PINCTRL_PIN(A14),
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A14, U18, SCU8C, 22),
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A14, U18, SCU8C, 22),
SSSF_PIN_DECL(A14, GPIOG0, SGPSCK, SIG_DESC_SET(SCU84, 0));
ASPEED_PINCTRL_PIN(A14),
SIG_EXPR_LIST_ALIAS(A14, SPI1MOSI, SPI1);
SIG_EXPR_LIST_DECL_SINGLE(A14, VBMOSI, VGABIOSROM, COND1, VB_DESC);
PIN_DECL_2(A14, GPIOI6, SPI1MOSI, VBMOSI);
FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15);
FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15);
FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15);
FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15);
ASPEED_PINCTRL_PIN(A14),
SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
PIN_DECL_1(A14, GPIOL1, SDA9);
FUNC_GROUP_DECL(I2C9, D15, A14);
PIC32_PINCTRL_GROUP(14, A14,
PINMUX_IPSR_GPSR(IP5_31_28, A14),
PINMUX_IPSR_GPSR(IP0_25, A14),
PINMUX_IPSR_GPSR(IP3_14_12, A14),
PINMUX_IPSR_GPSR(IP1_19_17, A14),
PINMUX_SINGLE(A14),
PINMUX_IPSR_GPSR(IP2_15_14, A14),
#define GPSR1_14 F_(A14, IP3_23_20)
#define IP3_23_20 FM(A14) FM(LCDOUT14) FM(MSIOF3_RXD_C) F_(0, 0) FM(HCTS4_N) FM(VI5_DATA10) FM(DU_DG6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP3_23_20, A14),
#define GPSR1_14 F_(A14, IP3_23_20)
#define IP3_23_20 FM(A14) FM(LCDOUT14) FM(MSIOF3_RXD_C) F_(0, 0) FM(HCTS4_N) FM(VI5_DATA10) FM(DU_DG6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP3_23_20, A14),
#define GPSR1_14 F_(A14, IP3_23_20)
#define IP3_23_20 FM(A14) FM(LCDOUT14) FM(MSIOF3_RXD_C) F_(0, 0) FM(HCTS4_N) FM(VI5_DATA10) FM(DU_DG6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP3_23_20, A14),
#define IP1_27_24 FM(DU_DB4) F_(0, 0) F_(0, 0) FM(A14) FM(FXR_CLKOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1_27_24, A14),
#define IP1_27_24 FM(DU_DB4) FM(HCTS0_N_A) F_(0, 0) FM(A14) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1_27_24, A14),
#define IP4_23_20 FM(A14) FM(MSIOF1_SS1) FM(MSIOF2_RXD_B) FM(VI4_DATA15) FM(HTX4_D) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(LCDOUT3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP4_23_20, A14),
#define GPSR1_14 F_(A14, IP4_23_20)
#define IP1SR1_27_24 FM(MSIOF1_SCK) FM(HSCK3) FM(CTS3_N) F_(0, 0) FM(DU_DG4) FM(A14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1SR1_27_24, A14),
GPIO_FN(A14),
GPIO_FN(A14),
GPIO_FN(A14), GPIO_FN(LCD_DATA14_A), GPIO_FN(TIOC3C_C),
PINMUX_IPSR_GPSR(IP0_29_28, A14),
GPIO_FN(A14),