V3D_READ
def->name, def->reg, V3D_READ(def->reg));
ident0 = V3D_READ(V3D_HUB_IDENT0);
ident1 = V3D_READ(V3D_HUB_IDENT1);
ident2 = V3D_READ(V3D_HUB_IDENT2);
ident3 = V3D_READ(V3D_HUB_IDENT3);
mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
ident1 = V3D_READ(V3D_HUB_IDENT1);
ident3 = V3D_READ(V3D_HUB_IDENT3);
args->value = V3D_READ(offset);
intsts = V3D_READ(V3D_HUB_INT_STS);
u32 axi_id = V3D_READ(V3D_MMU_VIO_ID);
u64 vio_addr = ((u64)V3D_READ(V3D_MMU_VIO_ADDR) <<
V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL));
ret = wait_for(!(V3D_READ(V3D_MMUC_CONTROL) &
V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL) |
ret = wait_for(!(V3D_READ(V3D_MMU_CTL) &
args->value = V3D_READ(V3D_IDENT0);
args->value = V3D_READ(V3D_IDENT1);
args->value = V3D_READ(V3D_IDENT2);
state->ct0ca = V3D_READ(V3D_CTNCA(0));
state->ct0ea = V3D_READ(V3D_CTNEA(0));
state->ct1ca = V3D_READ(V3D_CTNCA(1));
state->ct1ea = V3D_READ(V3D_CTNEA(1));
state->ct0cs = V3D_READ(V3D_CTNCS(0));
state->ct1cs = V3D_READ(V3D_CTNCS(1));
state->ct0ra0 = V3D_READ(V3D_CT00RA0);
state->ct1ra0 = V3D_READ(V3D_CT01RA0);
state->bpca = V3D_READ(V3D_BPCA);
state->bpcs = V3D_READ(V3D_BPCS);
state->bpoa = V3D_READ(V3D_BPOA);
state->bpos = V3D_READ(V3D_BPOS);
state->vpmbase = V3D_READ(V3D_VPMBASE);
state->dbge = V3D_READ(V3D_DBGE);
state->fdbgo = V3D_READ(V3D_FDBGO);
state->fdbgb = V3D_READ(V3D_FDBGB);
state->fdbgr = V3D_READ(V3D_FDBGR);
state->fdbgs = V3D_READ(V3D_FDBGS);
state->errstat = V3D_READ(V3D_ERRSTAT);
ct0ca = V3D_READ(V3D_CTNCA(0));
ct1ca = V3D_READ(V3D_CTNCA(1));
intctl = V3D_READ(V3D_INTCTL);
perfmon->counters[i] += V3D_READ(V3D_PCTR(i));
uint32_t ident1 = V3D_READ(V3D_IDENT1);
if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) {
V3D_READ(V3D_IDENT0), V3D_EXPECTED_IDENT0);