UART_LSR
while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
prom_putchar_wait(base + UART_LSR * 4, UART_LSR_BOTH_EMPTY);
prom_putchar_wait(base + UART_LSR * 4, UART_LSR_BOTH_EMPTY);
while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0))
status = serial_in(UART_LSR);
while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0);
while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0);
return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0);
while ((udbg_uart_in(UART_LSR) & LSR_THRE) == 0)
if (!(udbg_uart_in(UART_LSR) & LSR_DR))
while (!(udbg_uart_in(UART_LSR) & LSR_DR))
(void) in_8(avr_addr + UART_LSR);
char lsr = in_8(avr_addr + UART_LSR);
while (in_8(avr_addr + UART_LSR) & UART_LSR_DR)
while (inb_p(speakup_info.port_tts + UART_LSR) & UART_LSR_DR) {
inb(speakup_info.port_tts + UART_LSR);
while (!(inb_p(speakup_info.port_tts + UART_LSR) & UART_LSR_DR)) {
lsr = inb_p(speakup_info.port_tts + UART_LSR);
if (inb(ser->port + UART_LSR) == 0xff) {
(!uart_lsr_tx_empty(inb(speakup_info.port_tts + UART_LSR)))
if (!(inb(iobase + UART_LSR) & UART_LSR_THRE))
} while (inb(iobase + UART_LSR) & UART_LSR_DR);
lsr = inb(iobase + UART_LSR);
while (!(sinp(UART_LSR) & UART_LSR_THRE))
while (!(sinp(UART_LSR) & UART_LSR_TEMT))
sinp(UART_LSR);
sinp(UART_LSR);
sinp(UART_LSR);
*status = sdio_in(port, UART_LSR);
lsr = sdio_in(port, UART_LSR);
(void) sdio_in(port, UART_LSR);
status = inb(info->ioaddr + UART_LSR);
return !(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT);
status = inb(port->ioaddr + UART_LSR);
status = inb(port->ioaddr + UART_LSR);
status = inb(port->ioaddr + UART_LSR);
if (inb(info->ioaddr + UART_LSR) == 0xff) {
(void) inb(info->ioaddr + UART_LSR);
(void) inb(info->ioaddr + UART_LSR);
lsr |= serial_in(up, UART_LSR);
lsr = serial_port_in(port, UART_LSR);
lsr = serial_in(up, UART_LSR);
status = serial_port_in(p, UART_LSR);
status = serial_port_in(p, UART_LSR);
lsr = mem_serial_in(p, UART_LSR);
lsr = readb (p->membase + (UART_LSR << p->regshift));
status = serial8250_early_in(port, UART_LSR);
status = serial8250_early_in(port, UART_LSR);
case UART_LSR: /* LSR @ 0x18 (+1) */
lsr = serial_in(up, UART_LSR);
lsr = orig_lsr = serial_port_in(port, UART_LSR);
lsr = early_in(port, UART_LSR);
#define KUART_EMODE_ICR_VALUE UART_LSR
serial_in(up, UART_LSR);
status = serial_port_in(port, UART_LSR);
lsr = serial_port_in(port, UART_LSR);
lsr = serial_in(up, UART_LSR);
!uart_lsr_tx_empty(serial_in(up, UART_LSR)))
!(serial_in(up, UART_LSR) & UART_LSR_THRE))
lsr = serial_port_in(port, UART_LSR);
lsr_temt = serial_port_in(port, UART_LSR) & UART_LSR_TEMT;
(serial_port_in(port, UART_LSR) == 0xff)) {
serial_port_in(port, UART_LSR);
for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
status = au_serial_in(port, UART_LSR);
[UART_LSR] = 7,
status = p->serial_in(p, UART_LSR);
status = serial_in(up, UART_LSR);
status = serial_in(up, UART_LSR);
status = omap_serial_early_in(port, UART_LSR);
while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
serial_in(up, UART_LSR));
lsr = serial_in(up, UART_LSR);
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
(void) serial_in(up, UART_LSR);
if (serial_in(up, UART_LSR) & UART_LSR_DR)
if (serial_in(up, UART_LSR) & UART_LSR_DR)
status = ioread8(up->membase + UART_LSR);
u8 lsr = ioread8(priv->membase + UART_LSR);
"LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
lsr = ioread8(priv->membase + UART_LSR);
for (i = 0, lsr = ioread8(priv->membase + UART_LSR);
lsr = ioread8(priv->membase + UART_LSR)) {
return ioread8(priv->membase + UART_LSR);
*status = serial_in(up, UART_LSR);
lsr = serial_in(up, UART_LSR);
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
(void) serial_in(up, UART_LSR);
(void) serial_in(up, UART_LSR);
status = serial_in(up, UART_LSR);
unsigned char lsr = serial_in(up, UART_LSR);
lsr = serial_in(up, UART_LSR);
lsr = tegra_uart_read(tup, UART_LSR);
unsigned long lsr = tegra_uart_read(tup, UART_LSR);
unsigned long lsr = tegra_uart_read(tup, UART_LSR);
lsr = tegra_uart_read(tup, UART_LSR);
tegra_uart_read(tup, UART_LSR));
lsr = tegra_uart_read(tup, UART_LSR);
lsr = tegra_uart_read(tup, UART_LSR);
status = serial_in(up, UART_LSR);
*status = serial_in(up, UART_LSR);
status = serial_in(up, UART_LSR);
} while (serial_in(up, UART_LSR) & UART_LSR_DR);
unsigned char status = serial_in(up, UART_LSR);
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
(void) serial_in(up, UART_LSR);
(serial_in(up, UART_LSR) == 0xff)) {
(void) serial_in(up, UART_LSR);
lsr = serial_in(up, UART_LSR);
result = ark3116_read_reg(serial, UART_LSR, buf);
case UART_LSR:
case UART_LSR:
while ((status = inb(uart->base + UART_LSR)) & UART_LSR_DR) {
inb(uart->base + UART_LSR); /* Clear any pre-existing overrun indication */
if ((inb(uart->base + UART_LSR) & UART_LSR_THRE) != 0) {