TxReset
outw(TxReset, ioaddr + EL3_CMD);
outw(TxReset, ioaddr + EL3_CMD);
if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
outw(TxReset, ioaddr + EL3_CMD);
outw(TxReset, ioaddr + EL3_CMD);
outw(TxReset, ioaddr + EL3_CMD);
tc574_wait_for_completion(dev, TxReset);
tc574_wait_for_completion(dev, TxReset);
tc574_wait_for_completion(dev, TxReset);
tc574_wait_for_completion(dev, TxReset);
tc574_wait_for_completion(dev, TxReset);
tc589_wait_for_completion(dev, TxReset);
tc589_wait_for_completion(dev, TxReset);
tc589_wait_for_completion(dev, TxReset);
issue_and_wait(dev, TxReset);
issue_and_wait(dev, TxReset);
issue_and_wait(dev, TxReset|reset_mask);
issue_and_wait(dev, TxReset);
TxReset | DMAReset | FIFOReset | NetworkReset);
dw16(ASICCtrl + 2, TxReset | FIFOReset);
sundance_reset(dev, (NetworkReset|FIFOReset|DMAReset|TxReset) << 16);
sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) << 16);