drivers/gpu/drm/i915/display/intel_backlight.c

546

if (cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

1048

if (cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

1067

if (cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

3389

[PORT_A] = TRANSCODER_EDP,

drivers/gpu/drm/i915/display/intel_ddi.c

3883

if (cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

3955

return TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_ddi.c

4497

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

4498

pipe_config->cpu_transcoder = TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_ddi.c

4513

pipe_config->cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

4638

if (port_sync_transcoders & BIT(TRANSCODER_EDP))

drivers/gpu/drm/i915/display/intel_ddi.c

4639

crtc_state->master_transcoder = TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_ddi.c

482

if (master_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_ddi.c

552

if (cpu_transcoder == TRANSCODER_EDP) {

drivers/gpu/drm/i915/display/intel_ddi.c

768

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

769

cpu_transcoder = TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_ddi.c

825

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A) {

drivers/gpu/drm/i915/display/intel_ddi.c

827

TRANS_DDI_FUNC_CTL(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/display/intel_display.c

1640

if (cpu_transcoder != TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_display.c

2618

return transcoder == TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_display.c

2757

if (display->platform.haswell && cpu_transcoder == TRANSCODER_EDP &&

drivers/gpu/drm/i915/display/intel_display.c

3765

u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);

drivers/gpu/drm/i915/display/intel_display.c

3842

return enabled_transcoders & BIT(TRANSCODER_EDP);

drivers/gpu/drm/i915/display/intel_display.c

3853

return enabled_transcoders & ~(BIT(TRANSCODER_EDP) |

drivers/gpu/drm/i915/display/intel_display.c

4053

if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&

drivers/gpu/drm/i915/display/intel_display.h

63

case TRANSCODER_EDP:

drivers/gpu/drm/i915/display/intel_display_device.c

147

[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

153

[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

584

BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),

drivers/gpu/drm/i915/display/intel_display_device.c

637

BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),

drivers/gpu/drm/i915/display/intel_display_device.c

681

BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),

drivers/gpu/drm/i915/display/intel_display_device.c

831

BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \

drivers/gpu/drm/i915/display/intel_display_device.c

884

[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

892

[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

906

BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \

drivers/gpu/drm/i915/display/intel_display_power.h

127

((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \

drivers/gpu/drm/i915/display/intel_display_regs.h

1684

[TRANSCODER_EDP] = _CHICKEN_TRANS_EDP, \

drivers/gpu/drm/i915/display/intel_pipe_crc.c

317

pipe_config->cpu_transcoder == TRANSCODER_EDP)

drivers/gpu/drm/i915/display/intel_psr.c

1198

return cpu_transcoder == TRANSCODER_EDP;

drivers/gpu/drm/i915/display/intel_psr_regs.h

72

#define _EDP_PSR_TRANS_SHIFT(trans) ((trans) == TRANSCODER_EDP ? \

drivers/gpu/drm/i915/display/intel_vdsc.c

97

if (cpu_transcoder == TRANSCODER_EDP ||

drivers/gpu/drm/i915/gvt/display.c

211

for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {

drivers/gpu/drm/i915/gvt/display.c

300

TRANS_DDI_FUNC_CTL(display, TRANSCODER_EDP)) |=

drivers/gpu/drm/i915/gvt/display.c

77

if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE))

drivers/gpu/drm/i915/gvt/handlers.c

2305

MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL,

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

152

MMIO_D(TRANSCONF(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

277

MMIO_D(TRANS_HTOTAL(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

278

MMIO_D(TRANS_HBLANK(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

279

MMIO_D(TRANS_HSYNC(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

280

MMIO_D(TRANS_VTOTAL(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

281

MMIO_D(TRANS_VBLANK(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

282

MMIO_D(TRANS_VSYNC(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

283

MMIO_D(BCLRPAT(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

284

MMIO_D(TRANS_VSYNCSHIFT(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

309

MMIO_D(PIPE_DATA_M1(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

310

MMIO_D(PIPE_DATA_N1(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

311

MMIO_D(PIPE_DATA_M2(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

312

MMIO_D(PIPE_DATA_N2(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

313

MMIO_D(PIPE_LINK_M1(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

314

MMIO_D(PIPE_LINK_N1(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

315

MMIO_D(PIPE_LINK_M2(display, TRANSCODER_EDP));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

316

MMIO_D(PIPE_LINK_N2(display, TRANSCODER_EDP));