TIM_CR1
writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1);
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, cr1);
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
regmap_read(priv->regmap, TIM_CR1, &priv->bak.cr1);
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
regmap_write(priv->regmap, TIM_CR1, priv->bak.cr1);
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_read(priv->regmap, TIM_CR1, &cr1);
regmap_read(priv->regmap, TIM_CR1, &dat);
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_read(priv->regmap, TIM_CR1, &priv->bak.cr1);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_write(priv->regmap, TIM_CR1, priv->bak.cr1);
ret = regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
ret = regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);