SZ_64M
#define OMAP_CS0_SIZE SZ_64M
#define OMAP_CS1_SIZE SZ_64M
#define OMAP_CS2_SIZE SZ_64M
#define OMAP_CS3_SIZE SZ_64M
.size = SZ_64M,
.offset = SZ_4M + SZ_64M,
.size = SZ_256M - (SZ_4M + SZ_64M),
.end = SZ_64M - 1,
memblock_add(0xa0000000, SZ_64M);
#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
#define S3C64XX_SZ_ONENAND1_BUF (SZ_64M)
#define VDSO_RANDOMIZE_SIZE (TASK_IS_32BIT_ADDR ? SZ_1M : SZ_64M)
memsize = SZ_64M; /* minimum memsize is 64MB RAM */
#define VDSO_RANDOMIZE_SIZE (TASK_IS_32BIT_ADDR ? SZ_1M : SZ_64M)
#define CRASH_ALIGN SZ_64M
offset = memstart_addr + index * SZ_64M + offset;
start = memstart_addr + index * SZ_64M;
if (linear_sz < SZ_64M)
index %= linear_sz / SZ_64M;
offset = random % (SZ_64M - kernel_sz);
if (offset >= SZ_64M) {
tlb_virt = round_down(kernstart_virt_addr, SZ_64M);
tlb_phys = round_down(kernstart_addr, SZ_64M);
__builtin_ctzll(SZ_32M), __builtin_ctzll(SZ_64M), __builtin_ctzll(SZ_128M),
(SZ_32M), (SZ_64M), (SZ_128M),
for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
phys = (area << 26) + SZ_64M - SZ_4K;
.end = 0x10000000 + SZ_64M - 1,
.end = 0x10000000 + SZ_64M - 1,
{ .size = SZ_64M, .flag = PMB_SZ_64M, },
#define AIE2_DEVM_SIZE SZ_64M
ivpu_hw_range_init(vdev, &vdev->hw->ranges.runtime, 0x84800000, SZ_64M);
ivpu_hw_range_init(vdev, &vdev->hw->ranges.runtime, 0x80000000, SZ_64M);
case SZ_64M:
param.vram_size = SZ_64M;
case SZ_64M:
vram_size = SZ_64M;
if (max_buffer_size > SZ_64M)
max_buffer_size = SZ_64M;
SZ_64M,
SZ_64M
SZ_64M
gmem_range_min = SZ_64M;
#define CARVEOUT_SZ SZ_64M
#define XE_BO_SHRINK_SIZE ((unsigned long)SZ_64M)
KUNIT_ASSERT_EQ(test, SZ_64M - SZ_8M, pf_profile_fair_ggtt(gt, num_vfs));
KUNIT_ASSERT_EQ(test, SZ_64M, pf_profile_fair_ggtt(gt, num_vfs));
pf_get_ggtt_alignment(gt) : SZ_64M;
return SZ_64M - SZ_8M;
ureq->qbuf_len, 0, ureq->qbuf_va, SZ_64M - SZ_4K,
amcr = mm_ospi2_size / SZ_64M;
SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
case SZ_64M:
.size = SZ_64M,
.size = SZ_64M,
.size = SZ_64M,
if (nor->params->size == SZ_64M)
.size = SZ_64M,
.size = SZ_64M,
nor->params->n_dice = nor->params->size / SZ_64M;
.size = SZ_64M,
.size = SZ_64M,
case SZ_64M:
if (resource_size(res) != SZ_64M) {
if (resource_size(res) != SZ_64M) {
case SZ_64M:
if (!IS_ALIGNED(r->start, SZ_64M) || resource_size(r) != SZ_64M) {
resource_set_range(r, 0, SZ_64M);
#define DEFAULT_CARDBUS_MEM_SIZE SZ_64M
ispi->chip0_size = SZ_64M;
#define VID_MEM_LIMIT SZ_64M
return SZ_64M;
data = SZ_64M; break; /* 64 Mega byte */
thresh = max_t(u64, SZ_64M, mult_perc(thresh, 1));
#define BTRFS_ASYNC_DISCARD_DEFAULT_MAX_SIZE (SZ_64M)
test_start = SZ_64M;
btrfs_set_extent_bit(&tree, SZ_32M, SZ_64M - 1,
btrfs_set_extent_bit(&tree, SZ_64M, SZ_64M + SZ_8M - 1, CHUNK_ALLOCATED, NULL);
btrfs_find_first_clear_extent_bit(&tree, SZ_64M + SZ_1M, &start, &end,
if (start != SZ_64M || end != SZ_64M + SZ_8M - 1) {
btrfs_find_first_clear_extent_bit(&tree, SZ_64M - SZ_8M, &start, &end,
if (start != SZ_64M || end != SZ_64M + SZ_8M - 1) {
if (start != SZ_64M + SZ_8M || end != -1) {
.physical_start = SZ_64M - SZ_4M,
{SZ_64M - SZ_4M, SZ_64M - SZ_4M + SZ_256M},
#define FW_SIZE SZ_64M
.base = SZ_64M,
.size = SZ_64M
.base = SZ_64M,
.size = SZ_64M
.size = SZ_64M
.base = SZ_64M,
.size = SZ_64M
.size = SZ_64M