arch/loongarch/include/asm/crash_reserve.h

7

#define CRASH_ADDR_LOW_MAX SZ_4G

arch/mips/kernel/smp-cps.c

172

end = SZ_4G - 1;

arch/powerpc/kernel/setup_64.c

798

if (firmware_has_feature(FW_FEATURE_LPAR) && mce_limit > SZ_4G)

arch/powerpc/kernel/setup_64.c

799

mce_limit = SZ_4G;

arch/powerpc/platforms/powernv/pci-ioda.c

1427

res_end = min(window_size, SZ_4G) >> tbl->it_page_shift;

arch/riscv/kernel/usercfi.c

120

return PAGE_ALIGN(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G));

arch/x86/include/asm/crash_reserve.h

27

# define CRASH_ADDR_LOW_MAX SZ_4G

arch/x86/kernel/e820.c

620

#define MAX_GAP_END SZ_4G

arch/x86/kernel/kvm.c

965

.mask_lo = (u32)(~(SZ_4G - tolud - 1)) | MTRR_PHYSMASK_V,

arch/x86/kernel/shstk.c

132

return PAGE_ALIGN(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G));

arch/x86/kernel/shstk.c

561

if (addr && addr < SZ_4G)

arch/x86/kernel/sys_x86_64.c

203

info.low_limit = SZ_4G;

drivers/base/arch_numa.c

353

return memblock_start_of_DRAM() + SZ_4G;

drivers/edac/pnd2_edac.c

591

return (sys < SZ_4G) ? sys : sys - (SZ_4G - top_lm);

drivers/edac/pnd2_edac.c

647

(addr >= top_lm && addr < SZ_4G) || addr >= top_hm) {

drivers/gpu/drm/i915/gt/intel_ggtt.c

824

#define GUC_TOP_RESERVE_SIZE (SZ_4G - GUC_GGTT_TOP)

drivers/gpu/drm/i915/selftests/intel_memory_region.c

386

size = (SZ_4G - 1) & PAGE_MASK;

drivers/gpu/drm/imagination/pvr_rogue_heap_config.h

62

#define ROGUE_PDSCODEDATA_HEAP_SIZE SZ_4G

drivers/gpu/drm/imagination/pvr_rogue_heap_config.h

80

#define ROGUE_USCCODE_HEAP_SIZE SZ_4G

drivers/gpu/drm/msm/adreno/adreno_gpu.c

239

return SZ_4G;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

242

return SZ_4G;

drivers/gpu/drm/panfrost/panfrost_mmu.c

752

#define PFN_4G (SZ_4G >> PAGE_SHIFT)

drivers/gpu/drm/panfrost/panfrost_mmu.c

805

drm_mm_init(&mmu->mm, SZ_32M >> PAGE_SHIFT, (SZ_4G - SZ_32M) >> PAGE_SHIFT);

drivers/gpu/drm/panthor/panthor_fw.c

1463

0, SZ_4G,

drivers/gpu/drm/panthor/panthor_mmu.c

1410

user_va_range = full_va_range > SZ_4G ?

drivers/gpu/drm/panthor/panthor_mmu.c

2446

va_range = SZ_4G;

drivers/gpu/drm/tests/drm_buddy_test.c

36

u64 mm_size = SZ_4G;

drivers/gpu/drm/xe/xe_ggtt.c

354

ggtt_size = SZ_4G - ggtt_start;

drivers/iommu/mtk_iommu.c

347

#define MTK_IOMMU_IOVA_SZ_4G (SZ_4G - SZ_8M) /* 8M as gap */

drivers/iommu/mtk_iommu.c

363

{ .iova_base = SZ_4G, .size = SZ_4G * 3}, /* APU VPU */

drivers/iommu/mtk_iommu.c

370

{ .iova_base = SZ_4G, .size = MTK_IOMMU_IOVA_SZ_4G}, /* 4G ~ 8G */

drivers/iommu/mtk_iommu.c

371

{ .iova_base = SZ_4G * 2, .size = MTK_IOMMU_IOVA_SZ_4G}, /* 8G ~ 12G */

drivers/iommu/mtk_iommu.c

372

{ .iova_base = SZ_4G * 3, .size = MTK_IOMMU_IOVA_SZ_4G}, /* 12G ~ 16G */

drivers/mtd/nand/raw/loongson-nand-controller.c

709

case SZ_4G:

drivers/pci/controller/cadence/pcie-cadence-host-hpa.c

131

if (size + cpu_addr >= SZ_4G) {

drivers/pci/controller/cadence/pcie-cadence-host.c

183

if (size + cpu_addr >= SZ_4G) {

drivers/pci/controller/dwc/pcie-designware.c

1001

pci->region_limit = (max << 32) | (SZ_4G - 1);

drivers/pci/controller/pcie-brcmstb.c

1057

(pci_offset < SZ_4G && pci_offset > SZ_2G)) {

drivers/pci/controller/pcie-brcmstb.c

1229

if (inbound_wins[2].pci_offset >= SZ_4G ||

drivers/pci/controller/pcie-brcmstb.c

1230

(inbound_wins[2].size + inbound_wins[2].pci_offset) < SZ_4G)

drivers/pci/controller/plda/pcie-microchip-host.c

684

mc_pcie_setup_inbound_atr(port, 0, 0, 0, SZ_4G);

drivers/soc/sunxi/sunxi_mbus.c

88

ret = dma_direct_set_offset(dev, PHYS_OFFSET, 0, SZ_4G);

drivers/spi/spi-nxp-xspi.c

750

cs1_top_address = SZ_4G - 1;

drivers/spi/spi-nxp-xspi.c

752

cs0_top_address = SZ_4G - 1;

drivers/spi/spi-nxp-xspi.c

753

cs1_top_address = SZ_4G - 1;

fs/btrfs/tests/extent-map-tests.c

1030

map->start = SZ_4G;

fs/btrfs/tests/extent-map-tests.c

1112

.mapped_logical= {SZ_4G + SZ_4M}

fs/btrfs/tests/extent-map-tests.c

1122

.physical_start = SZ_4G,

include/linux/crash_reserve.h

48

#define CRASH_ADDR_LOW_MAX SZ_4G

kernel/bpf/arena.c

199

if (vm_range > SZ_4G)

kernel/bpf/arena.c

434

if (len > SZ_4G)

kernel/bpf/arena.c

455

return round_up(ret, SZ_4G);

kernel/bpf/arena.c

47

#define KERN_VM_SZ (SZ_4G + GUARD_SZ)

kernel/bpf/arena.c

479

if (WARN_ON_ONCE(vma->vm_end - vma->vm_start > SZ_4G || vma->vm_pgoff))

mm/cma.c

395

if (!memblock_bottom_up() && limit >= SZ_4G + size) {

mm/cma.c

397

addr = memblock_alloc_range_nid(size, align, SZ_4G, limit,

mm/mm_init.c

415

if (usable_startpfn < PHYS_PFN(SZ_4G)) {

tools/testing/nvdimm/test/ndtest.c

949

if (gen_pool_add(ndtest_pool, SZ_4G, SZ_4G, NUMA_NO_NODE)) {

tools/testing/nvdimm/test/nfit.c

3296

if (gen_pool_add(nfit_pool, SZ_4G, SZ_4G, NUMA_NO_NODE)) {

tools/testing/selftests/kvm/guest_memfd_test.c

428

const uint64_t gpa = SZ_4G;

tools/testing/selftests/kvm/mmu_stress_test.c

281

const uint64_t start_gpa = SZ_4G;