arch/arm/boot/compressed/fdt_check_mem_start.c
167
return round_up(fdt_mem_start, SZ_2M);
arch/arm/include/asm/efi.h
74
#define EFI_PHYS_ALIGN max(UL(SZ_2M), roundup_pow_of_two(TEXT_OFFSET))
arch/arm/mach-omap1/board-osk.c
92
.size = SZ_2M,
arch/arm/mach-omap1/board-sx1.c
246
.size = SZ_2M - 2 * SZ_128K,
arch/arm/mach-omap2/iomap.h
192
#define L4_WK_54XX_SIZE SZ_2M
arch/arm/mach-omap2/iomap.h
243
#define L4_PER3_DRA7XX_SIZE SZ_2M
arch/arm/mach-omap2/iomap.h
251
#define L4_CFG_DRA7XX_SIZE (SZ_1M + SZ_2M)
arch/arm/mach-orion5x/kurobox_pro-setup.c
44
#define KUROBOX_PRO_NAND_SIZE SZ_2M
arch/arm/mm/mmu.c
1131
vm_reserve_area_early(PCI_IO_VIRT_BASE, SZ_2M, pci_reserve_io);
arch/arm64/include/asm/boot.h
13
#define MAX_FDT_SIZE SZ_2M
arch/arm64/include/asm/boot.h
18
#define MIN_KIMG_ALIGN SZ_2M
arch/arm64/include/asm/crash_reserve.h
6
#define CRASH_ALIGN SZ_2M
arch/arm64/kernel/image-vars.h
160
kimage_limit = ALIGN(ABSOLUTE(_end + SZ_64K), SZ_2M);
arch/arm64/kernel/machine_kexec_file.c
178
kbuf.buf_align = SZ_2M;
arch/arm64/kvm/nested.c
443
max_size = SZ_2M;
arch/arm64/kvm/nested.c
541
else if (sz < SZ_2M) sz = SZ_2M;
arch/arm64/lib/insn.c
83
#define ADR_IMM_SIZE SZ_2M
arch/loongarch/include/asm/crash_reserve.h
5
#define CRASH_ALIGN SZ_2M
arch/loongarch/include/asm/efi.h
30
return SZ_2M;
arch/loongarch/kernel/kexec_efi.c
67
kbuf.buf_align = SZ_2M;
arch/powerpc/platforms/83xx/misc.c
127
int immrsize = IS_ALIGNED(immrbase, SZ_2M) ? SZ_2M : SZ_1M;
arch/powerpc/platforms/pseries/iommu.c
1386
__builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G), __builtin_ctzll(SZ_2M)
arch/powerpc/platforms/pseries/iommu.c
1788
(SZ_256M), (SZ_16G), (SZ_2M)
arch/riscv/include/asm/efi.h
38
return IS_ENABLED(CONFIG_64BIT) ? SZ_2M : SZ_4M;
arch/riscv/include/asm/pgtable.h
103
#define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
arch/sh/boards/board-edosk7760.c
41
.size = SZ_2M,
arch/x86/kernel/cpu/cpuid_0x2_table.c
32
CACHE_ENTRY(0x25, CACHE_L3, SZ_2M ), /* 8-way set assoc, sectored cache, 64 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
47
CACHE_ENTRY(0x45, CACHE_L2, SZ_2M ), /* 4-way set assoc, 32 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
66
CACHE_ENTRY(0x7d, CACHE_L2, SZ_2M ), /* 8-way set assoc, 64 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
72
CACHE_ENTRY(0x85, CACHE_L2, SZ_2M ), /* 8-way set assoc, 32 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
77
CACHE_ENTRY(0xd2, CACHE_L3, SZ_2M ), /* 4-way set assoc, 64 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
79
CACHE_ENTRY(0xd7, CACHE_L3, SZ_2M ), /* 8-way set assoc, 64 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
81
CACHE_ENTRY(0xdc, CACHE_L3, SZ_2M ), /* 12-way set assoc, 64 byte line size */
arch/x86/kernel/cpu/cpuid_0x2_table.c
84
CACHE_ENTRY(0xe2, CACHE_L3, SZ_2M ), /* 16-way set assoc, 64 byte line size */
drivers/accel/habanalabs/common/command_buffer.c
286
if (cb_size > SZ_2M) {
drivers/accel/habanalabs/common/command_buffer.c
288
cb_size, SZ_2M);
drivers/accel/habanalabs/common/habanalabs.h
1026
#define HL_CPU_ACCESSIBLE_MEM_SIZE SZ_2M
drivers/accel/habanalabs/common/mmu/mmu.c
1087
virt_addr = hl_asic_dma_alloc_coherent(hdev, SZ_2M, &phys_addr,
drivers/accel/habanalabs/common/mmu/mmu.c
1093
phys_addr, SZ_2M, -1)) {
drivers/accel/habanalabs/common/mmu/mmu.c
1094
hl_asic_dma_free_coherent(hdev, SZ_2M, virt_addr, phys_addr);
drivers/accel/habanalabs/gaudi/gaudi.c
5670
if (cb_size > SZ_2M) {
drivers/accel/habanalabs/gaudi/gaudi.c
5671
dev_err(hdev->dev, "CB size must be smaller than %uMB", SZ_2M);
drivers/accel/habanalabs/gaudi/gaudi.c
5946
kernel_addr = hl_asic_dma_alloc_coherent(hdev, SZ_2M, &dma_addr, GFP_KERNEL | __GFP_ZERO);
drivers/accel/habanalabs/gaudi/gaudi.c
6001
size_to_dma = SZ_2M;
drivers/accel/habanalabs/gaudi/gaudi.c
6005
if (size_left < SZ_2M)
drivers/accel/habanalabs/gaudi/gaudi.c
6015
if (size_left <= SZ_2M)
drivers/accel/habanalabs/gaudi/gaudi.c
6018
pos += SZ_2M;
drivers/accel/habanalabs/gaudi/gaudi.c
6019
addr += SZ_2M;
drivers/accel/habanalabs/gaudi/gaudi.c
6020
size_left -= SZ_2M;
drivers/accel/habanalabs/gaudi/gaudi.c
6035
hl_asic_dma_free_coherent(hdev, SZ_2M, kernel_addr, dma_addr);
drivers/accel/habanalabs/gaudi/gaudiP.h
157
#define HOST_SPACE_INTERNAL_CB_SZ SZ_2M
drivers/accel/habanalabs/gaudi2/gaudi2.c
11044
host_mem_virtual_addr = hl_asic_dma_alloc_coherent(hdev, SZ_2M, &host_mem_dma_addr,
drivers/accel/habanalabs/gaudi2/gaudi2.c
11053
reserved_va_base = hl_reserve_va_block(hdev, ctx, HL_VA_RANGE_TYPE_HOST, SZ_2M,
drivers/accel/habanalabs/gaudi2/gaudi2.c
11064
rc = hl_mmu_map_contiguous(ctx, reserved_va_base, host_mem_dma_addr, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11072
ctx->asid, reserved_va_base, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11074
hl_mmu_unmap_contiguous(ctx, reserved_va_base, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11085
size_to_dma = SZ_2M;
drivers/accel/habanalabs/gaudi2/gaudi2.c
11088
if (size_left < SZ_2M)
drivers/accel/habanalabs/gaudi2/gaudi2.c
11097
if (size_left <= SZ_2M)
drivers/accel/habanalabs/gaudi2/gaudi2.c
11100
pos += SZ_2M;
drivers/accel/habanalabs/gaudi2/gaudi2.c
11101
addr += SZ_2M;
drivers/accel/habanalabs/gaudi2/gaudi2.c
11102
size_left -= SZ_2M;
drivers/accel/habanalabs/gaudi2/gaudi2.c
11109
rc = hl_mmu_unmap_contiguous(ctx, reserved_va_base, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11114
ctx->asid, reserved_va_base, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11118
hl_unreserve_va_block(hdev, ctx, reserved_va_base, SZ_2M);
drivers/accel/habanalabs/gaudi2/gaudi2.c
11120
hl_asic_dma_free_coherent(hdev, SZ_2M, host_mem_virtual_addr, host_mem_dma_addr);
drivers/accel/habanalabs/gaudi2/gaudi2P.h
112
#define EDMA_PQS_SIZE SZ_2M
drivers/accel/habanalabs/gaudi2/gaudi2P.h
145
#define HOST_SPACE_INTERNAL_CB_SZ SZ_2M
drivers/accel/habanalabs/goya/goya.c
4921
for (cpu_off = 0 ; cpu_off < SZ_2M ; cpu_off += PAGE_SIZE_4KB) {
drivers/accel/habanalabs/goya/goya.c
4989
for (cpu_off = 0 ; cpu_off < SZ_2M ; cpu_off += PAGE_SIZE_4KB)
drivers/accel/habanalabs/goya/goya.c
4993
(cpu_off + PAGE_SIZE_4KB) >= SZ_2M))
drivers/accel/habanalabs/goya/goyaP.h
135
#if (HL_CPU_ACCESSIBLE_MEM_SIZE != SZ_2M)
drivers/accel/ivpu/ivpu_fw.c
20
#define FW_SHAVE_NN_MAX_SIZE SZ_2M
drivers/block/aoe/aoeblk.c
339
.io_opt = SZ_2M,
drivers/crypto/ccp/sev-dev-tio.c
24
#define SLA_SZ(s) ((s).page_size == SLA_PAGE_SIZE_2M ? SZ_2M : SZ_4K)
drivers/dma/idxd/idxd.h
177
#define WQ_DEFAULT_MAX_XFER SZ_2M
drivers/firmware/efi/libstub/efi-stub.c
267
if (IS_ALIGNED(in->phys_addr, SZ_2M) && size >= SZ_2M)
drivers/firmware/efi/libstub/efi-stub.c
268
efi_virt_base = round_up(efi_virt_base, SZ_2M);
drivers/firmware/efi/libstub/fdt.c
209
# define MAX_FDT_SIZE SZ_2M
drivers/fwctl/main.c
18
MAX_RPC_LEN = SZ_2M,
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
1881
TTM_ALLOCATION_POOL_BENEFICIAL_ORDER(get_order(SZ_2M)));
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
2031
TTM_ALLOCATION_POOL_BENEFICIAL_ORDER(get_order(SZ_2M)));
drivers/gpu/drm/arm/malidp_planes.c
469
if (pgsize == SZ_64K || pgsize == SZ_2M) {
drivers/gpu/drm/arm/malidp_planes.c
66
#define MALIDP_MMU_PREFETCH_FULL_PGSIZES (SZ_1M | SZ_2M)
drivers/gpu/drm/armada/armada_gem.c
136
unsigned align = min_t(unsigned, size, SZ_2M);
drivers/gpu/drm/ast/ast_mm.c
63
vram_size -= SZ_2M;
drivers/gpu/drm/etnaviv/etnaviv_iommu.c
16
#define PT_SIZE SZ_2M
drivers/gpu/drm/i915/display/intel_fb.c
1644
view->gtt.remapped.plane_alignment = SZ_2M / PAGE_SIZE;
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1381
{ igt_create_internal, SZ_64K, SZ_2M, },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1474
{ SZ_2M, SZ_2M },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1475
{ SZ_2M, SZ_64K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1476
{ SZ_2M - SZ_64K, SZ_64K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1477
{ SZ_2M - SZ_4K, SZ_64K | SZ_4K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1478
{ SZ_2M + SZ_4K, SZ_64K | SZ_4K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1479
{ SZ_2M + SZ_4K, SZ_2M | SZ_4K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1480
{ SZ_2M + SZ_64K, SZ_2M | SZ_64K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1481
{ SZ_2M + SZ_64K, SZ_64K },
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
1858
obj = i915_gem_object_create_shmem(i915, SZ_2M);
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
411
IS_ALIGNED(i915_vma_offset(vma), SZ_2M) &&
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
412
vma->page_sizes.sg & SZ_2M &&
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
413
vma->resource->page_sizes_gtt < SZ_2M) {
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
887
.size = SZ_2M,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
892
.size = SZ_2M - SZ_4K,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
897
.size = SZ_2M + SZ_4K,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
902
.size = SZ_2M + SZ_64K,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
907
.size = SZ_2M - SZ_64K,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
914
.offset = SZ_2M,
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
919
.offset = SZ_2M - SZ_64K,
drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
199
obj = i915_gem_object_create_lmem(i915, SZ_2M, 0);
drivers/gpu/drm/i915/gt/gen8_ppgtt.c
555
end - start >= SZ_2M && !index) {
drivers/gpu/drm/i915/gt/intel_migrate.c
187
sz += (sz / SZ_2M) * SZ_64K;
drivers/gpu/drm/i915/gt/intel_migrate.c
385
GEM_BUG_ON(!IS_ALIGNED(offset, SZ_2M));
drivers/gpu/drm/i915/gt/intel_migrate.c
387
offset /= SZ_2M;
drivers/gpu/drm/i915/gt/intel_migrate.c
432
if (IS_ALIGNED(total, SZ_2M)) {
drivers/gpu/drm/i915/gt/intel_migrate.c
435
dword_rem = SZ_2M - (total & (SZ_2M - 1));
drivers/gpu/drm/i915/gt/intel_migrate.c
52
d->offset += SZ_2M;
drivers/gpu/drm/i915/gt/intel_wopcm.c
46
#define GEN11_WOPCM_SIZE SZ_2M
drivers/gpu/drm/i915/gt/selftest_migrate.c
17
SZ_2M,
drivers/gpu/drm/i915/gt/selftest_migrate.c
897
SZ_2M,
drivers/gpu/drm/i915/gt/selftest_migrate.c
980
SZ_2M,
drivers/gpu/drm/i915/gt/selftest_timeline.c
830
obj = i915_gem_object_create_internal(gt->i915, SZ_2M);
drivers/gpu/drm/i915/gt/selftest_tlb.c
90
addr = round_up(addr, SZ_2M);
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
20
#define GUC_LOG_DEFAULT_CRASH_BUFFER_SIZE SZ_2M
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
25
#define GUC_LOG_DEFAULT_DEBUG_BUFFER_SIZE SZ_2M
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
138
#define INTEL_UC_RSVD_GGTT_PER_FW SZ_2M
drivers/gpu/drm/i915/gvt/scheduler.c
1424
ce->ring_size = SZ_2M;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
1008
unsigned int sizes[] = { SZ_2M, SZ_1G };
drivers/gpu/drm/imagination/pvr_mmu.c
52
#elif (PVR_DEVICE_PAGE_SIZE == SZ_2M)
drivers/gpu/drm/imagination/pvr_rogue_heap_config.h
103
#define ROGUE_VISTEST_HEAP_SIZE SZ_2M
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
1100
.gmem = SZ_2M,
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
1487
.gmem = SZ_2M,
drivers/gpu/drm/msm/msm_gem_vma.c
1161
uint64_t pte_mask = ~(SZ_2M - 1);
drivers/gpu/drm/panfrost/panfrost_gem.c
196
align = size >= SZ_2M ? SZ_2M >> PAGE_SHIFT : 0;
drivers/gpu/drm/panfrost/panfrost_gem.c
485
size = roundup(size, SZ_2M);
drivers/gpu/drm/panfrost/panfrost_gem.c
94
int n_sgt = bo->base.base.size / SZ_2M;
drivers/gpu/drm/panfrost/panfrost_mmu.c
372
size_t blk_offset = -addr % SZ_2M;
drivers/gpu/drm/panfrost/panfrost_mmu.c
374
if (blk_offset || size < SZ_2M) {
drivers/gpu/drm/panfrost/panfrost_mmu.c
379
*count = min(blk_offset, size) / SZ_2M;
drivers/gpu/drm/panfrost/panfrost_mmu.c
380
return SZ_2M;
drivers/gpu/drm/panfrost/panfrost_mmu.c
585
#define NUM_FAULT_PAGES (SZ_2M / PAGE_SIZE)
drivers/gpu/drm/panfrost/panfrost_mmu.c
613
addr &= ~((u64)SZ_2M - 1);
drivers/gpu/drm/panfrost/panfrost_mmu.c
624
bo->base.base.size / SZ_2M,
drivers/gpu/drm/panfrost/panfrost_mmu.c
645
sgt = &bo->sgts[page_offset / (SZ_2M / PAGE_SIZE)];
drivers/gpu/drm/panfrost/panfrost_mmu.c
681
NUM_FAULT_PAGES, 0, SZ_2M, GFP_KERNEL);
drivers/gpu/drm/panfrost/panfrost_mmu.c
695
bo->heap_rss_size += SZ_2M;
drivers/gpu/drm/panfrost/panfrost_mmu.c
812
.pgsize_bitmap = SZ_4K | SZ_2M,
drivers/gpu/drm/panthor/panthor_mmu.c
1050
size >= SZ_2M ? SZ_2M : SZ_4K,
drivers/gpu/drm/panthor/panthor_mmu.c
1302
if (va != ALIGN(va, SZ_2M))
drivers/gpu/drm/panthor/panthor_mmu.c
1305
if (va + size != ALIGN(va + size, SZ_2M) &&
drivers/gpu/drm/panthor/panthor_mmu.c
1306
ALIGN(va + size, SZ_2M) != ALIGN(va, SZ_2M))
drivers/gpu/drm/panthor/panthor_mmu.c
2114
return folio_size(page_folio(pg)) >= SZ_2M;
drivers/gpu/drm/panthor/panthor_mmu.c
2124
aligned_unmap_start = ALIGN_DOWN(*unmap_start, SZ_2M);
drivers/gpu/drm/panthor/panthor_mmu.c
2125
aligned_unmap_end = ALIGN(unmap_end, SZ_2M);
drivers/gpu/drm/panthor/panthor_mmu.c
2463
.pgsize_bitmap = SZ_4K | SZ_2M,
drivers/gpu/drm/panthor/panthor_mmu.c
843
size_t blk_offset = -addr % SZ_2M;
drivers/gpu/drm/panthor/panthor_mmu.c
845
if (blk_offset || size < SZ_2M) {
drivers/gpu/drm/panthor/panthor_mmu.c
850
*count = min(blk_offset, size) / SZ_2M;
drivers/gpu/drm/panthor/panthor_mmu.c
851
return SZ_2M;
drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
17
#define DUT_GGTT_SIZE SZ_2M
drivers/gpu/drm/xe/tests/xe_migrate.c
77
bool big = xe_bo_size(bo) >= SZ_2M;
drivers/gpu/drm/xe/xe_bo.c
2164
size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
1473
return SZ_2M;
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
1670
xe_gt_assert(gt, pf_get_lmem_alignment(gt) == SZ_2M);
drivers/gpu/drm/xe/xe_guc_log.c
24
#define GUC_LOG_CHUNK_SIZE SZ_2M
drivers/gpu/drm/xe/xe_guc_log.h
18
#define XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE SZ_2M
drivers/gpu/drm/xe/xe_guc_tlb_inval.c
166
if (length >= SZ_2M) {
drivers/gpu/drm/xe/xe_guc_tlb_inval.c
174
ilog2(SZ_2M) + 1)));
drivers/gpu/drm/xe/xe_lmtt_2l.c
106
return ilog2(SZ_2M);
drivers/gpu/drm/xe/xe_lmtt_2l.c
130
XE_WARN_ON(!IS_ALIGNED(offset, SZ_2M));
drivers/gpu/drm/xe/xe_lmtt_2l.c
131
XE_WARN_ON(!FIELD_FIT(LMTT_2L_PTE_LMEM_PAGE, offset / SZ_2M));
drivers/gpu/drm/xe/xe_lmtt_2l.c
132
return FIELD_PREP(LMTT_2L_PTE_LMEM_PAGE, offset / SZ_2M) | LMTT_2L_PTE_VALID;
drivers/gpu/drm/xe/xe_lmtt_2l.c
67
#define LMTT_2L_PTE_MAX_NUM BIT(LMTT_2L_HAW - ilog2(SZ_2M))
drivers/gpu/drm/xe/xe_lmtt_ml.c
112
return ilog2(SZ_2M);
drivers/gpu/drm/xe/xe_lmtt_ml.c
140
XE_WARN_ON(!IS_ALIGNED(offset, SZ_2M));
drivers/gpu/drm/xe/xe_lmtt_ml.c
141
XE_WARN_ON(!FIELD_FIT(LMTT_ML_PTE_LMEM_PAGE, offset / SZ_2M));
drivers/gpu/drm/xe/xe_lmtt_ml.c
142
return FIELD_PREP(LMTT_ML_PTE_LMEM_PAGE, offset / SZ_2M) | LMTT_ML_PTE_VALID;
drivers/gpu/drm/xe/xe_lmtt_ml.c
67
#define LMTT_ML_PTE_MAX_NUM BIT(35 - ilog2(SZ_2M))
drivers/gpu/drm/xe/xe_migrate.c
156
xe_assert(xe, IS_ALIGNED(xe_vram_region_usable_size(vram), SZ_2M));
drivers/gpu/drm/xe/xe_migrate.c
175
pos += SZ_2M, ofs += 8)
drivers/gpu/drm/xe/xe_migrate.c
201
BUILD_BUG_ON(NUM_PT_SLOTS > SZ_2M/XE_PAGE_SIZE);
drivers/gpu/drm/xe/xe_migrate.c
208
xe_tile_assert(tile, m->batch_base_ofs + xe_bo_size(batch) < SZ_2M);
drivers/gpu/drm/xe/xe_migrate.c
581
u64 size = min(*L0, (u64)avail_pts * SZ_2M);
drivers/gpu/drm/xe/xe_migrate.c
88
#define LEVEL0_PAGE_TABLE_ENCODE_SIZE SZ_2M
drivers/gpu/drm/xe/xe_pt.c
1619
reclamation_size = COMPUTE_RECLAIM_ADDRESS_MASK(SZ_2M); /* reclamation_size = 9 */
drivers/gpu/drm/xe/xe_pt.c
1620
xe_tile_assert(tile, phys_addr % SZ_2M == 0);
drivers/gpu/drm/xe/xe_pt.c
2127
return xe_svm_range_size(range) >= SZ_2M;
drivers/gpu/drm/xe/xe_svm.c
1147
case SZ_2M: \
drivers/gpu/drm/xe/xe_svm.c
1173
case SZ_2M: \
drivers/gpu/drm/xe/xe_svm.c
799
SZ_2M,
drivers/gpu/drm/xe/xe_vm.c
2502
return SZ_2M;
drivers/gpu/drm/xe/xe_vm.c
2517
case SZ_2M:
drivers/gpu/drm/xe/xe_wopcm.c
56
#define WOPCM_SIZE SZ_2M
drivers/infiniband/hw/irdma/i40iw_hw.c
247
dev->hw_attrs.page_size_cap = SZ_4K | SZ_2M;
drivers/infiniband/hw/irdma/icrdma_hw.c
193
dev->hw_attrs.page_size_cap = SZ_4K | SZ_2M | SZ_1G;
drivers/infiniband/hw/irdma/ig3rdma_hw.c
128
dev->hw_attrs.page_size_cap = SZ_4K | SZ_2M | SZ_1G;
drivers/infiniband/hw/mana/mana_ib.h
22
SZ_512K | SZ_1M | SZ_2M)
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
4531
smmu->pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G;
drivers/iommu/arm/arm-smmu/arm-smmu.c
1921
smmu->pgsize_bitmap |= SZ_4K | SZ_2M | SZ_1G;
drivers/iommu/intel/iommu.c
2961
dmar_domain->domain.pgsize_bitmap &= ~(u64)SZ_2M;
drivers/iommu/intel/iommu.c
3079
if (!(sslps & BIT(0)) && (dmar_domain->domain.pgsize_bitmap & SZ_2M))
drivers/iommu/io-pgtable-arm-selftests.c
157
SZ_4K | SZ_2M | SZ_1G,
drivers/iommu/io-pgtable-arm.c
1166
cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
drivers/iommu/io-pgtable-arm.c
1176
cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
drivers/iommu/io-pgtable-arm.c
1192
cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
drivers/iommu/io-pgtable-arm.c
896
page_sizes = (SZ_4K | SZ_2M | SZ_1G);
drivers/iommu/ipmmu-vmsa.c
574
domain->io_domain.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K;
drivers/iommu/riscv/iommu.c
1422
domain->domain.pgsize_bitmap = va_mask & (SZ_4K | SZ_2M | SZ_1G | SZ_512G);
drivers/media/platform/nvidia/tegra-vde/v4l2.c
649
pix_mp->plane_fmt[0].sizeimage = max(ALIGN(size, SXE_BUFFER), SZ_2M);
drivers/mfd/ls2k-bmc-core.c
30
#define LS2K_DISPLAY_RES_START (SZ_16M + SZ_2M)
drivers/mmc/core/sd.c
56
SZ_2M / 512, SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
drivers/mtd/nand/raw/nand_ids.c
46
SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
drivers/mtd/nand/raw/nand_ids.c
55
SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
drivers/mtd/spi-nor/atmel.c
196
.size = SZ_2M,
drivers/mtd/spi-nor/core.c
1721
(unsigned long)(nor->mtd.size / SZ_2M));
drivers/mtd/spi-nor/eon.c
47
.size = SZ_2M,
drivers/mtd/spi-nor/gigadevice.c
40
.size = SZ_2M,
drivers/mtd/spi-nor/intel.c
15
.size = SZ_2M,
drivers/mtd/spi-nor/issi.c
86
.size = SZ_2M,
drivers/mtd/spi-nor/macronix.c
216
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
271
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
307
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
332
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
345
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
372
.size = SZ_2M,
drivers/mtd/spi-nor/micron-st.c
439
.size = SZ_2M,
drivers/mtd/spi-nor/spansion.c
1081
.size = SZ_2M,
drivers/mtd/spi-nor/spansion.c
842
.size = SZ_2M,
drivers/mtd/spi-nor/spansion.c
958
.size = SZ_2M,
drivers/mtd/spi-nor/sst.c
114
.size = SZ_2M,
drivers/mtd/spi-nor/sst.c
148
.size = SZ_2M,
drivers/mtd/spi-nor/sst.c
165
.size = SZ_2M,
drivers/mtd/spi-nor/winbond.c
178
.size = SZ_2M,
drivers/mtd/spi-nor/winbond.c
251
.size = SZ_2M,
drivers/mtd/spi-nor/winbond.c
285
.size = SZ_2M,
drivers/mtd/spi-nor/winbond.c
39
nor->params->size == SZ_2M &&
drivers/mtd/spi-nor/winbond.c
40
nor->params->erase_map.regions[0].size == SZ_2M) {
drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cpp.h
37
#define NFP_CPP_SAFE_AREA_SIZE SZ_2M
drivers/net/pcs/pcs-xpcs-plat.c
262
spc_size = pxpcs->reg_width * SZ_2M;
drivers/ntb/hw/mscc/ntb_hw_switchtec.c
21
static ulong max_mw_size = SZ_2M;
drivers/nvdimm/btt.c
413
size_t chunk_size = SZ_2M;
drivers/pci/controller/dwc/pcie-designware-host.c
454
atu.parent_bus_addr = pp->cfg0_base + SZ_2M;
drivers/pci/controller/dwc/pcie-designware-host.c
455
atu.size = (SZ_1M * bus_range_max) - SZ_2M;
drivers/pci/controller/pci-ftpci100.c
131
case SZ_2M:
drivers/pci/controller/pci-v3-semi.c
623
case SZ_2M:
drivers/remoteproc/ti_k3_dsp_remoteproc.c
206
.boot_align_addr = SZ_2M,
drivers/remoteproc/ti_k3_dsp_remoteproc.c
213
.boot_align_addr = SZ_2M,
drivers/spi/spi-intel.c
1334
ispi->chip0_size = SZ_2M;
drivers/staging/sm750fb/sm750_hw.c
35
sm750_dev->vidreg_size = SZ_2M;
drivers/uio/uio_hv_generic.c
174
const size_t ring_bytes = SZ_2M;
drivers/uio/uio_hv_generic.c
259
ring_size = SZ_2M;
drivers/vfio/pci/mlx5/cmd.c
1507
u64 rq_size = SZ_2M;
fs/btrfs/block-group.c
4047
if (bytes_used + SZ_2M < mult_perc(sinfo->total_bytes, 80))
fs/btrfs/block-group.h
119
#define CACHING_CTL_WAKE_UP SZ_2M
fs/btrfs/extent-tree.c
2819
*empty_cluster = SZ_2M;
fs/btrfs/extent-tree.c
2824
*empty_cluster = SZ_2M;
fs/btrfs/tests/extent-io-tests.c
612
btrfs_find_first_clear_extent_bit(&tree, SZ_2M, &start, &end,
fs/btrfs/tests/free-space-tests.c
120
ret = btrfs_remove_free_space(cache, SZ_1M, SZ_2M);
fs/btrfs/tests/free-space-tests.c
133
ret = test_add_free_space_entry(cache, next_bitmap_offset - SZ_2M,
fs/btrfs/tests/free-space-tests.c
141
ret = btrfs_remove_free_space(cache, next_bitmap_offset - SZ_1M, SZ_2M);
fs/btrfs/tests/free-space-tests.c
147
if (test_check_exists(cache, next_bitmap_offset - SZ_1M, SZ_2M)) {
fs/btrfs/tests/free-space-tests.c
242
ret = test_add_free_space_entry(cache, SZ_2M, SZ_2M, 0);
fs/btrfs/tests/free-space-tests.c
302
ret = test_add_free_space_entry(cache, SZ_1M, SZ_2M, 1);
fs/btrfs/tests/free-space-tests.c
63
ret = btrfs_remove_free_space(cache, SZ_2M, 4096);
fs/btrfs/tests/free-space-tests.c
74
if (test_check_exists(cache, SZ_2M, 4096)) {
fs/btrfs/tests/raid-stripe-tree-tests.c
51
u64 hole_len = SZ_2M;
fs/btrfs/tests/raid-stripe-tree-tests.c
510
u64 logical2 = SZ_2M;
include/linux/blk-integrity.h
14
#define BLK_INTEGRITY_MAX_SIZE SZ_2M
include/linux/crash_reserve.h
45
#define CRASH_ALIGN SZ_2M
kernel/bpf/core.c
901
#define BPF_PROG_PACK_SIZE (SZ_2M * num_possible_nodes())
sound/soc/sprd/sprd-pcm-compress.c
37
#define SPRD_COMPR_AREA_BUF_SIZE SZ_2M
tools/testing/cxl/test/cxl.c
1431
cxl_mock_pool = gen_pool_create(ilog2(SZ_2M), NUMA_NO_NODE);
tools/testing/memblock/tests/basic_api.c
1442
.base = SZ_2M,
tools/testing/memblock/tests/basic_api.c
1587
.base = PHYS_ADDR_MAX - SZ_2M,
tools/testing/memblock/tests/basic_api.c
1588
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
1593
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
1769
.base = SZ_2M,
tools/testing/memblock/tests/basic_api.c
2014
.base = PHYS_ADDR_MAX - SZ_2M,
tools/testing/memblock/tests/basic_api.c
2015
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
2020
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
2411
ASSERT_TRUE(memblock_overlaps_region(&memblock.memory, SZ_1G - SZ_1M, SZ_2M));
tools/testing/memblock/tests/basic_api.c
2412
ASSERT_TRUE(memblock_overlaps_region(&memblock.memory, SZ_1G + SZ_2M, SZ_2M));
tools/testing/memblock/tests/basic_api.c
2416
ASSERT_TRUE(memblock_overlaps_region(&memblock.memory, SZ_1G - SZ_2M, SZ_8M));
tools/testing/memblock/tests/basic_api.c
312
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
405
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
751
.base = SZ_2M,
tools/testing/memblock/tests/basic_api.c
781
.size = SZ_2M
tools/testing/memblock/tests/basic_api.c
874
.size = SZ_2M
tools/testing/selftests/kvm/memslot_perf_test.c
55
#define MEM_TEST_UNMAP_CHUNK_SIZE SZ_2M
tools/testing/selftests/kvm/pre_fault_memory_test.c
16
#define TEST_SIZE (SZ_2M + PAGE_SIZE)
tools/testing/selftests/kvm/pre_fault_memory_test.c
181
alignment = SZ_2M;
tools/testing/selftests/kvm/pre_fault_memory_test.c
193
pre_fault_memory(vcpu, gpa, 0, SZ_2M, 0, private);
tools/testing/selftests/kvm/pre_fault_memory_test.c
194
pre_fault_memory(vcpu, gpa, SZ_2M, PAGE_SIZE * 2, PAGE_SIZE, private);
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
116
GUEST_STAGE(0, SZ_2M),
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
118
GUEST_STAGE(PAGE_SIZE, SZ_2M),
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
119
GUEST_STAGE(SZ_2M, PAGE_SIZE),
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
27
#define PER_CPU_DATA_SIZE ((uint64_t)(SZ_2M + PAGE_SIZE))
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
376
const size_t alignment = max_t(size_t, SZ_2M, get_backing_src_pagesz(src_type));
tools/testing/selftests/vfio/vfio_dma_mapping_test.c
115
FIXTURE_VARIANT_ADD_ALL_IOMMU_MODES(anonymous_hugetlb_2mb, SZ_2M, MAP_HUGETLB | MAP_HUGE_2MB);
tools/testing/selftests/vfio/vfio_dma_mapping_test.c
179
case SZ_2M:
tools/testing/selftests/vfio/vfio_pci_driver_test.c
83
region_setup(self->iommu, self->iova_allocator, &driver->region, SZ_2M);